Analysis of the Task Superscalar Architecture Hardware Design. - Fahimeh Yazdanpanah; Daniel Jiménez-González; Carlos Álvarez-Martínez; Yoav Etsion; Rosa M. Badia (ICCS, 2013)

Hybrid Dataflow/von-Neumann Architectures. - Fahimeh Yazdanpanah; Carlos Álvarez-Martínez; Daniel Jiménez-González; Yoav Etsion (IEEE Trans. Parallel Distributed Syst., 2014)

Hardware design of task superscalar architecture. - Fahimeh Yazdanpanah (2014)

Picos: A hardware runtime architecture support for OmpSs. - Fahimeh Yazdanpanah; Carlos Álvarez 001; Daniel Jiménez-González; Rosa M. Badia; Mateo Valero (Future Gener. Comput. Syst., 2015)

Design space exploration of hardware task superscalar architecture. - Fahimeh Yazdanpanah; Mohammad Alaei (J. Supercomput., 2015)

An approach for analyzing auto-vectorization potential of emerging workloads. - Fahimeh Yazdanpanah (Microprocess. Microsystems, 2017)

HoneyWiN: Novel Honeycomb-Based Wireless NoC Architecture in Many-Core Era. - Raheel Afsharmazayejani; Fahimeh Yazdanpanah; Amin Rezaei 001; Mohammad Alaei; Masoud Daneshtalab (ARC, 2018)

An Energy Efficient Autonomous Method for Coverage Optimization in Wireless Multimedia Sensor Networks. - Jaber Pournazari; Mohammad Alaei; Fahimeh Yazdanpanah (Wirel. Pers. Commun., 2018)

EELCM: An Energy Efficient Load-Based Clustering Method for Wireless Mobile Sensor Networks. - Mohammad Alaei; Fahimeh Yazdanpanah (Mob. Networks Appl., 2019)

H2WNoC: A honeycomb hardware-efficient wireless network-on-chip architecture. - Mohammad Alaei; Fahimeh Yazdanpanah (Nano Commun. Networks, 2019)

An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chip. - Fahimeh Yazdanpanah; Raheel Afsharmazayejani; Mohammad Alaei; Amin Rezaei 001; Masoud Daneshtalab (J. Supercomput., 2019)

A QoS-aware congestion control mechanism for wireless multimedia sensor networks. - Mohammad Alaei; Parisa Sabbagh; Fahimeh Yazdanpanah (Wirel. Networks, 2019)

A high-performance FPGA-based multicrossbar prioritized network-on-chip. - Mohammad Alaei; Fahimeh Yazdanpanah (Concurr. Comput. Pract. Exp., 2021)

A systematic analysis of power saving techniques for wireless network-on-chip architectures. - Fahimeh Yazdanpanah; Raheel Afsharmazayejani (J. Syst. Archit., 2022)

A two-level network-on-chip architecture with multicast support. - Fahimeh Yazdanpanah (J. Parallel Distributed Comput., 2023)

A low-power WNoC transceiver with a novel energy consumption management scheme for dependable IoT systems. - Fahimeh Yazdanpanah (J. Parallel Distributed Comput., 2023)

An approach for low-power heterogeneous parallel implementation of ALC-PSO algorithm using OmpSs and CUDA. - Fahimeh Yazdanpanah; Mohammad Alaei (Parallel Comput., 2024)

A Survey on Heterogeneous CPU-GPU Architectures and Simulators. - Mohammad Alaei; Fahimeh Yazdanpanah (Concurr. Comput. Pract. Exp., 2025)