A power efficient 1.0625-3.125 Gb/s serial transceiver in 130 nm digital CMOS for multi-standard applications. - Zhongyuan Hou; Fan Yang 077; Junhua Liu; Xing Zhang 002 (Sci. China Inf. Sci., 2014)

A 0.5-2 GHz high frequency selectivity RF front-end with series N-path filter. - Ying Guo; Ling Shen; Fan Yang 077; Yongan Zheng; Long Chen 009; Xing Zhang 002; Huailin Liao (ISCAS, 2015)

A wide band CMOS radio frequency RMS power detector with 42-dB dynamic range. - Jiayi Wang; Yongan Zheng; Fan Yang 077; Fan Tian; Huailin Liao (ISCAS, 2015)

A high frequency resolution digitally controlled oscillator with differential tapped inductor. - Fan Yang 077; Runhua Wang; Xiaozhe Liu; Junhua Liu; Huailin Liao (ISCAS, 2015)

A low-power calibration-free fractional-N digital PLL with high linear phase interpolator. - Fan Yang 077; Hangyan Guo; Runhua Wang; Zherui Zhang; Junhua Liu; Huailin Liao (A-SSCC, 2016)

A 93.7% peak efficiency DC-DC buck converter with all-pass network based passive level shifter in 55 nm CMOS. - Xiucheng Hao; Fan Yang 077; Mingxiao He; Yongan Zheng; Ying Guo; Huailin Liao (ISCAS, 2016)

An 89 μW MICS/ISM band receiver for ultra-low-power applications. - Zexue Liu; Fan Yang 077; Haoyun Jiang; Xiucheng Hao; Junhua Liu; Huailin Liao (ISCAS, 2017)

A single-poly EEPROM with low leakage charge pump and peripheral circuits for passive RFID tag in a standard CMOS technology. - Fan Yang 077; Yongan Zheng; Chunguang Wang; Ling Shen; Huailin Liao (IEICE Electron. Express, 2017)

A Digital Phase Noise Cancelling Scheme for Ring Oscillator-based Fractional-N ADPLL. - Zherui Zhang; Heyi Li; Fan Yang 077; Haoyun Jiang; Junhua Liu; Huailin Liao (ISCAS, 2018)

A 2.4-mW interference-resilient receiver front end with series N-path filter-based balun for body channel communication. - Zexue Liu; Yongan Zheng; Jiayi Wang; Xiucheng Hao; Haoyun Jiang; Fan Yang 077; Junhua Liu; Huailin Liao (Int. J. Circuit Theory Appl., 2018)

A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity. - Zhengkun Shen; Haoyun Jiang; Heyi Li; Zherui Zhang; Fan Yang 077; Junhua Liu; Huailin Liao (IEEE Trans. Circuits Syst., 2020)

32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope. - Zhengkun Shen; Haoyun Jiang; Fan Yang 077; Yixiao Wang 001; Zherui Zhang; Junhua Liu; Huailin Liao (ISSCC, 2021)

A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope. - Zhengkun Shen; Haoyun Jiang; Fan Yang 077; Yixiao Wang 001; Zherui Zhang; Junhua Liu; Huailin Liao (IEEE J. Solid State Circuits, 2022)

An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF Array. - Dong Wang; Jiazheng Zhou; Hui Xu; Ningyuan Zhang; Xiaolei Su; Zhengkun Shen; Haoyun Jiang; Fan Yang 077; Yixiao Wang 001; Junhua Liu; Huailin Liao (VLSI Technology and Circuits, 2023)