A Scalable Area-Efficient Low-Delay Asynchronous AER Circuits Design for Neuromorphic Chips. - Siyuan Ouyang; Keji Zhou; Hao Jiang 024; Chenyang Li; Jinhao Liang; Fangduo Zhu; Xumeng Zhang; Qi Liu 010 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)