Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems. - Fanny Spagnolo; Stefania Perri; Fabio Frustaci; Pasquale Corsonello (ICECS, 2018)

Designing Fast Convolutional Engines for Deep Learning Applications. - Fanny Spagnolo; Stefania Perri; Fabio Frustaci; Pasquale Corsonello (ICECS, 2018)

Design of Real-Time FPGA-based Embedded System for Stereo Vision. - Stefania Perri; Fabio Frustaci; Fanny Spagnolo; Pasquale Corsonello (ISCAS, 2018)

Efficient Architecture for Integral Image Computation on Heterogeneous FPGAs. - Fanny Spagnolo; Pasquale Corsonello; Stefania Perri (PRIME, 2019)

An Efficient Hardware-Oriented Single-Pass Approach for Connected Component Analysis. - Fanny Spagnolo; Stefania Perri; Pasquale Corsonello (Sensors, 2019)

An Efficient Convolution Engine based on the À-trous Spatial Pyramid Pooling. - Cristian Sestito; Fanny Spagnolo; Pasquale Corsonello; Stefania Perri (ASAP, 2020)

A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs. - Fanny Spagnolo; Fabio Frustaci; Stefania Perri; Pasquale Corsonello (ICECS, 2020)

Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip. - Fanny Spagnolo; Stefania Perri; Fabio Frustaci; Pasquale Corsonello (MECO, 2020)

Parallel architecture of power-of-two multipliers for FPGAs. - Stefania Perri; Fanny Spagnolo; Fabio Frustaci; Pasquale Corsonello (IET Circuits Devices Syst., 2020)

Design of a real-time face detection architecture for heterogeneous systems-on-chips. - Fanny Spagnolo; Stefania Perri; Pasquale Corsonello (Integr., 2020)

Efficient Deconvolution Architecture for Heterogeneous Systems-on-Chip. - Stefania Perri; Cristian Sestito; Fanny Spagnolo; Pasquale Corsonello (J. Imaging, 2020)

Stereo vision architecture for heterogeneous systems-on-chip. - Stefania Perri; Fabio Frustaci; Fanny Spagnolo; Pasquale Corsonello (J. Real Time Image Process., 2020)

Design of Flexible Hardware Accelerators for Image Convolutions and Transposed Convolutions. - Cristian Sestito; Fanny Spagnolo; Stefania Perri (J. Imaging, 2021)

Accuracy Improved Low-Energy Multi-Bit Approximate Adders in QCA. - Stefania Perri; Fanny Spagnolo; Fabio Frustaci; Pasquale Corsonello (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

An FPGA-Based Hardware Accelerator for the k-Nearest Neighbor Algorithm Implementation in Wearable Embedded Systems. - Antonio Borelli; Fanny Spagnolo; Raffaele Gravina; Fabio Frustaci (AII, 2022)

Designing Low-Power and High-Speed FPGA-Based Binary Decision Tree Hardware Accelerators. - Roman Huzyuk; Fanny Spagnolo; Fabio Frustaci (AII, 2022)

ERMES: Efficient Racetrack Memory Emulation System based on FPGA. - Fanny Spagnolo; Salim Ullah; Pasquale Corsonello; Akash Kumar 001 (FPL, 2022)

Runtime Reconfigurable Hardware Accelerator for Energy-Efficient Transposed Convolutions. - Emanuel Marrazzo; Fanny Spagnolo; Stefania Perri (PRIME, 2022)

Heterogeneous FPGA-based System for Real-Time Drowsiness Detection. - Andrea Migali; Fanny Spagnolo; Pasquale Corsonello (PRIME, 2022)

Hardware-Oriented Multi-Exposure Fusion Approach for Real-Time Video Processing on FPGA. - Mario Andrea Sangiovanni; Fanny Spagnolo; Pasquale Corsonello (PRIME, 2022)

Approximate Down-Sampling Strategy for Power-Constrained Intelligent Systems. - Fanny Spagnolo; Stefania Perri; Pasquale Corsonello (IEEE Access, 2022)

Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes. - Fabio Frustaci; Fanny Spagnolo; Stefania Perri; Giuseppe Cocorullo; Pasquale Corsonello (Sensors, 2022)

Multibit Full Comparator Logic in Quantum-Dot Cellular Automata. - Stefania Perri; Fanny Spagnolo; Fabio Frustaci; Pasquale Corsonello (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Aggressive Approximation of the SoftMax Function for Power-Efficient Hardware Implementations. - Fanny Spagnolo; Stefania Perri; Pasquale Corsonello (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Design of Approximate Bilateral Filters for Image Denoising on FPGAs. - Fanny Spagnolo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (IEEE Access, 2023)

A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers. - Fabio Frustaci; Fanny Spagnolo; Stefania Perri; Pasquale Corsonello (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

HW/SW Codesign for Approximation-Aware Binary Neural Networks. - Abhilasha Dave; Fabio Frustaci; Fanny Spagnolo; Mikail Yayla; Jian-Jia Chen; Hussam Amrouch (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Design of Leading Zero Counters on FPGAs. - Stefania Perri; Fanny Spagnolo; Fabio Frustaci; Pasquale Corsonello (IEEE Embed. Syst. Lett., 2023)

Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-Based HW Accelerators. - Mikail Yayla; Fabio Frustaci; Fanny Spagnolo; Jian-Jia Chen; Hussam Amrouch (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

KIT: Kernel Isotropic Transformation of Bilateral Filters for Image Denoising on FPGA. - Fanny Spagnolo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (FPL, 2024)

Carry-chain based Ring Oscillator Design for Temperature Sensing on FPGAs. - Fanny Spagnolo; Pasquale Corsonello (SMACD, 2024)

Efficient implementation of signed multipliers on FPGAs. - Fanny Spagnolo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (Comput. Electr. Eng., 2024)

An explainable embedded neural system for on-board ship detection from optical satellite imagery. - Cosimo Ieracitano; Nadia Mammone; Fanny Spagnolo; Fabio Frustaci; Stefania Perri; Pasquale Corsonello; Francesco Carlo Morabito (Eng. Appl. Artif. Intell., 2024)

Approximate bilateral filters for real-time and low-energy imaging applications on FPGAs. - Fanny Spagnolo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (J. Supercomput., 2024)

Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization. - Fanny Spagnolo; Stefania Perri; Massimo Vatalaro; Fabio Frustaci; Felice Crupi; Pasquale Corsonello (IEEE Trans. Very Large Scale Integr. Syst., 2024)

A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations. - Fabio Frustaci; Fanny Spagnolo; Pasquale Corsonello; Stefania Perri (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Multi-Partner Project: Architectures and Design Methodologies to Accelerate AI Workloads. The ICSC Flagship 2 Project. - Cristina Silvano; Fabrizio Ferrandi; Serena Curzel; Daniele Ielmini; Stefania Perri; Fanny Spagnolo; Pasquale Corsonello; Sebastiano Fabio Schifano; Cristian Zambelli; Angelo Garofalo; Francesco Conti 001; Luca Benini (DATE, 2025)

Approximate Swish Activation Function for Low-Energy Yet Low-Error VLSI Implementations. - Fanny Spagnolo; Stefania Perri; Pasquale Corsonello (ISVLSI, 2025)

C4TERO: Configurable Cascaded Carry Chains for High Reliability TERO PUFs on FPGAs. - Fanny Spagnolo; Massimo Vatalaro; Stefania Perri; Felice Crupi; Pasquale Corsonello (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A Novel Compressive Sensing Method for Secure and Energy Efficient ECG Signal Transmission Applications. - Fanny Spagnolo; Bharat Lal; Pasquale Corsonello; Raffaele Gravina (IEEE J. Biomed. Health Informatics, 2025)

HIMAM: Hardware Implementation of Multiply-and-Max/Min Layers for Energy-Efficient DNN Inference. - Fanny Spagnolo; Pasquale Corsonello; Stefania Perri (IEEE Trans. Circuits Syst. II Express Briefs, 2025)