ASIC implementation of a hardware-embedded physical unclonable function. - Fareena Saqib; Matthew Areno; Jim Aarestad; James F. Plusquellic (IET Comput. Digit. Tech., 2014)

Cyber-physical systems: A security perspective. - Charalambos Konstantinou; Michail Maniatakos; Fareena Saqib; Shiyan Hu 001; Jim Plusquellic; Yier Jin (ETS, 2015)

GDS-II Trojan detection using multiple supply pad VDD and GND IDDQs in ASIC functional units. - Ian Wilcox; Fareena Saqib; James F. Plusquellic (HOST, 2015)

PUF-Based Authentication. - Wenjie Che; Fareena Saqib; Jim Plusquellic (ICCAD, 2015)

Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF). - Fareena Saqib; Aindrik Dutta; Jim Plusquellic; Philip Ortiz; Marios S. Pattichis (IEEE Trans. Computers, 2015)

Within-Die Delay Variation Measurement and Power Transient Analysis Using REBEL. - Fareena Saqib; Dylan Ismari; Charles Lamech; Jim Plusquellic (IEEE Trans. Very Large Scale Integr. Syst., 2015)

On detecting delay anomalies introduced by hardware trojans. - Dylan Ismari; Jim Plusquellic; Charles Lamech; Swarup Bhunia; Fareena Saqib (ICCAD, 2016)

Poster: Hardware based security enhanced framework for automotives. - Ali Shuja Siddiqui; Yutian Gui; Jim Plusquellic; Fareena Saqib (VNC, 2016)

Secure intra-vehicular communication over CANFD. - Ali Shuja Siddiqui; Chia-Che Lee; Wenjie Che; Jim Plusquellic; Fareena Saqib (AsianHOST, 2017)

A novel offset method for improving bitstring quality of a Hardware-Embedded delay PUF. - Wenjie Che; Jim Plusquellic; Fareena Saqib (HOST, 2017)

Physical unclonable functions and dynamic partial reconfiguration for security in resource-constrained embedded systems. - Goutham Pocklassery; Venkata K. Kajuruli; James F. Plusquellic; Fareena Saqib (HOST, 2017)

Secure communication over CANBus. - Ali Shuja Siddiqui; Yutian Gui; Jim Plusquellic; Fareena Saqib (MWSCAS, 2017)

Hardware based protection against malwares by PUF based access control mechanism. - Ali Shuja Siddiqui; Chia-Che Lee; Fareena Saqib (MWSCAS, 2017)

Analysis of Entropy in a Hardware-Embedded Delay PUF. - Wenjie Che; Venkata K. Kajuluri; Mitchell T. Martin; Fareena Saqib; Jim Plusquellic (Cryptogr., 2017)

Leveraging Distributions in Physical Unclonable Functions. - Wenjie Che; Venkata K. Kajuluri; Fareena Saqib; Jim Plusquellic (Cryptogr., 2017)

A Privacy-Preserving, Mutual PUF-Based Authentication Protocol. - Wenjie Che; Mitchell T. Martin; Goutham Pocklassery; Venkata K. Kajuluri; Fareena Saqib; Jim Plusquellic (Cryptogr., 2017)

Delay model and machine learning exploration of a hardware-embedded delay PUF. - Wenjie Che; Manel Martínez-Ramón; Fareena Saqib; Jim Plusquellic (HOST, 2018)

Self-authenticating secure boot for FPGAs. - Goutham Pocklassery; Wenjie Che; Fareena Saqib; Matthew Areno; Jim Plusquellic (HOST, 2018)

Hardware Assisted Security Architecture for Smart Grid. - Ali Shuja Siddiqui; Yutian Gui; David Lawrence; Stuart Laval; Jim Plusquellic; Madhav D. Manjrekar; Badrul H. Chowdhury; Fareena Saqib (IECON, 2018)

An Autonomous, Self-Authenticating, and Self-Contained Secure Boot Process for Field-Programmable Gate Arrays. - Don Owen Jr.; Derek Heeger; Calvin Chan; Wenjie Che; Fareena Saqib; Matthew Areno; Jim Plusquellic (Cryptogr., 2018)

Novel Offset Techniques for Improving Bitstring Quality of a Hardware-Embedded Delay PUF. - Wenjie Che; Fareena Saqib; Jim Plusquellic (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Security Vulnerabilities of Smart Meters in Smart Grid. - Yutian Gui; Ali Shuja Siddiqui; Suyash Mohan Tamore; Fareena Saqib (IECON, 2019)

Blockchain Based Distributed Key Provisioning and Secure Communication over CAN FD. - Bryson Shannon; Spandana Etikala; Yutian Gui; Ali Shuja Siddiqui; Fareena Saqib (ISVLSI, 2019)

Secure Design Flow of FPGA Based RISC-V Implementation. - Ali Shuja Siddiqui; Geraldine Shirley; Shreya Bendre; Girija Bhagwat; Jim Plusquellic; Fareena Saqib (IVSW, 2019)

Multilayer Camouflaged Secure Boot for SoCs. - Ali Shuja Siddiqui; Geraldine Shirley; Sam Reji Joseph; Yutian Gui; Jim Plusquellic; Marten van Dijk; Fareena Saqib (MTV, 2019)

Physical Unclonable Function (PUF)-Based e-Cash Transaction Protocol (PUF-Cash). - Jeff Calhoun; Cyrus Minwalla; Charles Helmich; Fareena Saqib; Wenjie Che; Jim Plusquellic (Cryptogr., 2019)

A Survey and Analysis on SoC Platform Security in ARM, Intel and RISC-V Architecture. - Geraldine Shirley Nicholas; Yutian Gui; Fareena Saqib (MWSCAS, 2020)

Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity. - Ivan Bow; Nahome Bete; Fareena Saqib; Wenjie Che; Chintan Patel; Ryan W. Robucci; Calvin Chan; Jim Plusquellic (Cryptogr., 2020)

Secure Boot for Reconfigurable Architectures. - Ali Shuja Siddiqui; Yutian Gui; Fareena Saqib (Cryptogr., 2020)

Key Update Countermeasure for Correlation-Based Side-Channel Attacks. - Yutian Gui; Suyash Mohan Tamore; Ali Shuja Siddiqui; Fareena Saqib (J. Hardw. Syst. Secur., 2020)

Hardware Secure Execution and Simulation Model Correlation using IFT on RISC-V. - Geraldine Shirley Nicholas; Bhavin Thakar; Fareena Saqib (ACM Great Lakes Symposium on VLSI, 2021)

A Lightweight Delay-based Authentication Scheme for DMA Attack Mitigation. - Yutian Gui; Ali Shuja Siddiqui; Geraldine Shirley Nicholas; Marcus Hughes; Fareena Saqib (ISQED, 2021)

A SoC Design of TrustZone based Key Provisioning for FPGA IP Protection. - Gregory Williams; Jerry Aizprua; Mohammad Alhaddad; Doua Yang; Nabila BouSaba; Fareena Saqib (MWSCAS, 2021)

A Delay-Based Machine Learning Model for DMA Attack Mitigation. - Yutian Gui; Chaitanya Bhure; Marcus Hughes; Fareena Saqib (Cryptogr., 2021)

A Secure Boot Framework with Multi-security Features and Logic-Locking Applications for Reconfigurable Logic. - Geraldine Shirley Nicholas; Ali Shuja Siddiqui; Sam Reji Joseph; Gregory Williams; Fareena Saqib (J. Hardw. Syst. Secur., 2021)

Dynamic Key Updates for LUT Locked Design. - Jakub Slowik; Gregory Williams; Rummah Albashir; Anthony Samagio; Geraldine Shirley Nicholas; Fareena Saqib (HOST, 2022)

Secure Instruction and Data-Level Information Flow Tracking Model for RISC-V. - Geraldine Shirley Nicholas; Dhruvakumar Vikas Aklekar; Bhavin Thakar; Fareena Saqib (Cryptogr., 2023)

AutoDetect: Novel Autoencoding Architecture for Counterfeit IC Detection. - Chaitanya Bhure; Geraldine Shirley Nicholas; Shajib Ghosh; Navid Asadi; Fareena Saqib (J. Hardw. Syst. Secur., 2024)