Block-Based Carry Speculative Approximate Adder for Energy-Efficient Applications. - Farhad Ebrahimi-Azandaryani; Omid Akbari; Mehdi Kamal; Ali Afzali-Kusha; Massoud Pedram (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Accuracy Configurable Adders with Negligible Delay Overhead in Exact Operating Mode. - Farhad Ebrahimi-Azandaryani; Omid Akbari; Mehdi Kamal; Ali Afzali-Kusha; Massoud Pedram (ACM Trans. Design Autom. Electr. Syst., 2023)

ExTern: Boosting RISC-V core performance using ternary encoding. - Farhad Ebrahimi-Azandaryani; Dietmar Fey (Microprocess. Microsystems, 2024)

FPGA Implementation of a Real-Time Application Based on RISC-V Cores. - Amr Abdelhafez; Farhad EbrahimiAzandaryani; Maurizio Bianconi; Dietmar Fey (SSD, 2025)

CSD-Driven Speedup in RISC-V Processor. - Farhad EbrahimiAzandaryani; Dietmar Fey (DASIP, 2025)