A novel SRAM-based FPGA architecture for defect and fault tolerance of configurable logic blocks. - Farid Lahrach; Abderrazek Abdaoui; Abderrahim Doumar; Eric Châtelet (DDECS, 2010)

Master-Slave TMR Inspired Technique for Fault Tolerance of SRAM-Based FPGA. - Farid Lahrach; Abderrahim Doumar; Eric Châtelet; Abderrazek Abdaoui (ISVLSI, 2010)

Fault tolerance of SRAM-based FPGA via configuration frames. - Farid Lahrach; Abderrahim Doumar; Eric Châtelet (DDECS, 2011)

Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems. - Farid Lahrach; Abderrahim Doumar; Eric Châtelet (DSD, 2011)

Tolérance aux pannes des circuits FPGAs à base de mémoire SRAM. (Fault tolerance of SRAM-based FPGAs circuits). - Farid Lahrach (2016)