Parallel pipelined VLSI arrays for real-time image processing. - Faridah M. Ali (1988)

Register-file allocation via graph coloring. - Faridah M. Ali; Imtiaz Ahmad (Microprocess. Microsystems, 1998)

TLS: A Tabu Search Based Scheduling Algorithm for Behavioral Synthesis of Functional Pipelines. - Imtiaz Ahmad; Muhammad K. Dhodhi; Faridah M. Ali (Comput. J., 2000)

An integrated state assignment and flip-flop selection technique for FSM synthesis. - Imtiaz Ahmad; Faridah M. Ali; Raza Ul-Mustafa (Microprocess. Microsystems, 2000)

Hardware-software co-synthesis of hard real-time systems with reconfigurable FPGAs. - Faridah M. Ali; A. Shoba Das (Comput. Electr. Eng., 2004)

Synthesis of finite state machines for improved state verification. - Imtiaz Ahmad; Faridah M. Ali; A. Shoba Das (Comput. Electr. Eng., 2006)

Hardware-Software Co-design for Reconfigurable Field Programmable Gate Arrays Using Mixed-Integer Programming. - Faridah M. Ali; Helal Al-Hamadi; Ahmed Ghoniem; Hanif D. Sherali (Informatica (Slovenia), 2012)