An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications. - Mahmood Rafiee; Farshad Pesaran; Ayoub Sadeghi; Nabiollah Shiri (Microelectron. J., 2021)

A high-efficient imprecise discrete cosine transform block based on a novel full adder and Wallace multiplier for bioimages compression. - Elham Esmaeili; Farshad Pesaran; Nabiollah Shiri (Int. J. Circuit Theory Appl., 2023)

Efficient GDI-based approximate subtractors for change detection in bio-image processing applications. - Fatemeh Pooladi; Farshad Pesaran; Nabiollah Shiri (Microelectron. J., 2023)

Imprecise Subtractor Using a New Efficient Approximate-Based Gate Diffusion Input Full Adder for Bioimages Processing. - Forouzan Bahrami; Nabiollah Shiri; Farshad Pesaran (Comput. Electr. Eng., 2023)

High-efficient reversible full adder realized by dynamic threshold-based gate diffusion input logics. - Seyedeh Fatemeh Deymad; Nabiollah Shiri; Farshad Pesaran (Microelectron. J., 2023)

Realization of a high-efficient GDI-based 4:2 compressor for sum of absolute difference detection in image and signal processing. - Mehdi Hosseinpour; Nabiollah Shiri; Farshad Pesaran (Comput. Electr. Eng., 2024)

A New Approximate Sum of Absolute Differences Unit for Bioimages Processing. - Forouzan Bahrami; Nabiollah Shiri; Farshad Pesaran (IEEE Embed. Syst. Lett., 2024)

High-Efficient Approximate Subtractors for Change Detection Applications. - Fatemeh Pooladi; Farshad Pesaran; Nabiollah Shiri (IEEE Embed. Syst. Lett., 2025)