Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes. - Fatemeh Serajeh-hassani; Mohammad Sadrosadati; Sebastian Pointner; Robert Wille; Hamid Sarbazi-Azad (ISVLSI, 2019)

Designing a one-bit coplanar QCA ALU using a novel robust area-efficient three-input majority gate design. - Samira Riki; Fatemeh Serajeh-hassani (J. Supercomput., 2023)

An Efficient FPGA Architecture with Turn-Restricted Switch Boxes. - Fatemeh Serajeh-hassani; Mohammad Sadrosadati; Nezam Rohbani; Sebastian Pointner; Robert Wille; Hamid Sarbazi-Azad (ACM Trans. Design Autom. Electr. Syst., 2024)

A survey of SSD simulators and emulators. - Atiyeh Gheibi-Fetrat; Fatemeh Serajeh-hassani; Masoud Mohammadi-Lak; Amir Mirzaei; Negar Akbarzadeh; Mahmoud Reza Kheyrati-Fard; Mohammad Hosseini 001; Ahmad Javadi Nezhad; Arash Tavakkol; Jeong A. Lee; Hamid Sarbazi-Azad (J. Supercomput., 2025)