An 8-bit 1.5-GS/s Voltage-Time Hybrid Two-Step ADC With Cross-Coupled Linearized VTC. - Xin Zhao 035; Dengquan Li; Feida Wang; Yi Shen 007; Shubin Liu; Ruixue Ding; Zhangming Zhu (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A 0.55-mm2 8-bit 32-GS/s TI-SAR ADC with optimized hierarchical sampling architecture. - Jiale Ding; Yukai Huang; Hao Zhang 111; Tian Feng; Feida Wang; Dengquan Li; Zhangming Zhu (Microelectron. J., 2024)

A 13b 2GS/s Time-Domain Pipelined ADC with Split-CDAC Ping-Pong Residue Transfer and PVT-Robust Self-Tracked Time Amplifier. - Xin Zhao 035; Dengquan Li; Feida Wang; Depan Li; Yi Shen 007; Hongzhi Liang; Zhangming Zhu (CICC, 2025)