High-Speed Redundant Modulo 2n-1 Adder. - Fekri Kharbash; Ghulam M. Chaudhry (AICCSA, 2006)

The performance of parallel prefix adders on nanometer FPGA. - Fekri Kharbash; Ghulam M. Chaudhry (PDCS, 2007)

QSDN: Quantum-dot cellular automata signed digit number adder. - Fekri Kharbash; Ghulam M. Chaudhry (PDCS, 2007)

Binary signed digit adder design with error detection capability. - Fekri Kharbash; Ghulam M. Chaudhry (ISSPA, 2007)

Reliable Binary Signed Digit Number Adder Design. - Fekri Kharbash; Ghulam M. Chaudhry (ISVLSI, 2007)

On Schmitt trigger and other inverters. - Walid Ibrahim; Valeriu Beiu; Mihai Tache; Fekri Kharbash (ICECS, 2013)

Using body bias when upsizing length for maximizing the static noise margins of CMOS gates. - Fekri Kharbash; Valeriu Beiu; Mihai Tache; Walid Ibrahim (ICECS, 2013)

Enabling sizing for enhancing the static noise margins. - Valeriu Beiu; Azam Beg; Walid Ibrahim; Fekri Kharbash; Massimo Alioto (ISQED, 2013)

Enhancing the Static Noise Margins by Upsizing Length for Ultra-Low Voltage/Power/Energy Gates. - Mihai Tache; Valeriu Beiu; Walid Ibrahim; Fekri Kharbash; Massimo Alioto (J. Low Power Electron., 2014)

A Cloud-based Brain-controlled Wheelchair with Autonomous Indoor Navigation System. - Abderrahmane Lakas; Fekri Kharbash; Abdelkader Nasreddine Belkacem (IWCMC, 2021)