Design of Interleaved Multithreading for Network Processors on Chip. - Henrique C. Freitas; Felipe Lopes Madruga; Marco A. Z. Alves; Philippe Olivier Alexandre Navaux (ISCAS, 2009)

Multi-core aware process mapping and its impact on communication overhead of parallel applications. - Eduardo Rocha Rodrigues; Felipe Lopes Madruga; Philippe Olivier Alexandre Navaux; Jairo Panetta (ISCC, 2009)

Evaluating Thread Placement Based on Memory Access Patterns for Multi-core Processors. - Matthias Diener; Felipe Lopes Madruga; Eduardo Rocha Rodrigues; Marco A. Z. Alves; Jörg Schneider 001; Philippe Olivier Alexandre Navaux; Hans-Ulrich Heiss (HPCC, 2010)

TLP and ILP exploitation through a reconfigurable multiprocessor system. - Mateus B. Rutzig; Felipe Lopes Madruga; Marco A. Z. Alves; Henrique Cota de Freitas; Antonio Carlos Schneider Beck; Nicolas Maillard; Philippe Olivier Alexandre Navaux; Luigi Carro (IPDPS Workshops, 2010)

Parallel Shared-Memory Workloads Performance on Asymmetric Multi-core Architectures. - Felipe Lopes Madruga; Henrique Cota de Freitas; Philippe Olivier Alexandre Navaux (PDP, 2010)

Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment. - Mateus B. Rutzig; Antonio Carlos Schneider Beck; Felipe Lopes Madruga; Marco A. Z. Alves; Henrique C. Freitas; Nicolas Maillard; Philippe Olivier Alexandre Navaux; Luigi Carro (Int. J. Reconfigurable Comput., 2011)