An implementation of a distributed fault-tolerant mechanism for 2D mesh NoCs. - César A. M. Marcon; Alexandre M. Amory; Felipe T. Bortolon; Thais Webber; Thomas Volpato; Jader Munareto (RSP, 2013)

Design and analysis of the HF-RISC processor targeting voltage scaling applications. - Felipe Todeschini Bortolon; Sergio Johann Filho; Matheus Gibiluka; Sergio Bampi; Ney Laert Vilar Calazans; Fabiano Passuelo Hessel; Matheus Trevisan Moreira (SBCCI, 2016)

Hardware and software infrastructure to implement many-core systems in modern FPGAs. - Felipe T. Bortolon; Fernando Gehm Moraes (SBCCI, 2017)

Estimation methods for static noise margins in CMOS subthreshold logic circuits. - Felipe T. Bortolon; Fernando Gehm Moraes; Matheus T. Moreira; Sergio Bampi (SBCCI, 2017)

Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems. - Felipe T. Bortolon; Geancarlo Abich; Sergio Bampi; Ricardo Reis 001; Fernando Moraes 001; Luciano Ost (ISCAS, 2018)

Evaluation of Compiler Optimization Flags Effects on Soft Error Resiliency. - Guilherme E. Medeiros; Felipe T. Bortolon; Ricardo Reis 001; Luciano Ost (SBCCI, 2018)

Evaluation of the soft error assessment consistency of a JIT-based virtual platform simulator. - Geancarlo Abich; Rafael Garibotti; Vitor V. Bandeira; Felipe da Rosa 001; Jonas Gava; Felipe T. Bortolon; Guilherme Medeiros; Fernando Moraes 001; Ricardo Reis 001; Luciano Ost (IET Comput. Digit. Tech., 2021)