FPGA-based K-means clustering using tree-based data structures. - Felix Winterstein; Samuel Bayliss; George A. Constantinides (FPL, 2013)

High-level synthesis of dynamic data structures: A case study using Vivado HLS. - Felix Winterstein; Samuel Bayliss; George A. Constantinides (FPT, 2013)

Compiling Higher Order Functional Programs to Composable Digital Hardware. - Eduardo Aguilar-Pelaez; Samuel Bayliss; Alex I. Smith; Felix Winterstein; Dan R. Ghica; David B. Thomas; George A. Constantinides (FCCM, 2014)

Separation Logic-Assisted Code Transformations for Efficient High-Level Synthesis. - Felix Winterstein; Samuel Bayliss; George A. Constantinides (FCCM, 2014)

MATCHUP: Memory Abstractions for Heap Manipulating Programs. - Felix Winterstein; Kermin Fleming; Hsin-Jung Yang; Samuel Bayliss; George A. Constantinides (FPGA, 2015)

Scavenger: Automating the construction of application-optimized memory hierarchies. - Hsin-Jung Yang; Kermin Fleming; Michael Adler; Felix Winterstein; Joel S. Emer (FPL, 2015)

Custom-sized caches in application-specific memory hierarchies. - Felix Winterstein; Kermin Fleming; Hsin-Jung Yang; John Wickerson; George A. Constantinides (FPT, 2015)

A Case for Work-stealing on FPGAs with OpenCL Atomics. - Nadesh Ramanathan; John Wickerson; Felix Winterstein; George A. Constantinides (FPGA, 2016)

LMC: Automatic Resource-Aware Program-Optimized Memory Partitioning. - Hsin-Jung Yang; Kermin Fleming; Michael Adler; Felix Winterstein; Joel S. Emer (FPGA, 2016)

Separation Logic for High-Level Synthesis. - Felix J. Winterstein; Samuel R. Bayliss; George A. Constantinides (ACM Trans. Reconfigurable Technol. Syst., 2016)

Automatic Construction of Program-Optimized FPGA Memory Networks. - Hsin-Jung Yang; Kermin Fleming; Felix Winterstein; Annie I. Chen; Michael Adler; Joel S. Emer (FPGA, 2017)

Pass a pointer: Exploring shared virtual memory abstractions in OpenCL tools for FPGAs. - Felix Winterstein; George A. Constantinides (FPT, 2017)

Custom Multicache Architectures for Heap Manipulating Programs. - Felix Winterstein; Kermin Elliott Fleming; Hsin-Jung Yang; George A. Constantinides (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

(FPL 2015) Scavenger: Automating the Construction of Application-Optimized Memory Hierarchies. - Hsin-Jung Yang; Kermin Fleming; Felix Winterstein; Michael Adler; Joel S. Emer (ACM Trans. Reconfigurable Technol. Syst., 2017)