A design-for-test technique for multistage analog circuits. - Michel Renovell; Florence Azaïs; Yves Bertrand (Asian Test Symposium, 1995)

The multi-configuration: A DFT technique for analog circuits. - Michel Renovell; Florence Azaïs; Yves Bertrand (VTS, 1996)

On-chip analog output response compaction. - Michel Renovell; Florence Azaïs; Yves Bertrand (ED&TC, 1997)

A Methodology and Design for Effective Testing of Voltage-Controlled Oscillators (VCOs. - Florence Azaïs; André Ivanov; Michel Renovell; Yves Bertrand (Asian Test Symposium, 1998)

BISTing Switched-Current Circuits. - Michel Renovell; Florence Azaïs; J.-C. Bodin; Yves Bertrand (Asian Test Symposium, 1998)

Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits. - Michel Renovell; Florence Azaïs; Yves Bertrand (DATE, 1998)

A Built-In Multi-Mode Stimuli Generator for Analogue and Mixed-Signal Testing. - Marcelo Lubaszewski; Michel Renovell; Salvador Mir; Florence Azaïs; Yves Bertrand (SBCCI, 1998)

Design-For-Testability for Switched-Current Circuits. - Florence Azaïs; Michel Renovell; Yves Bertrand; J.-C. Bodin (VTS, 1998)

Functional and structural testing of switched-current circuits. - Michel Renovell; Florence Azaïs; J.-C. Bodin; Yves Bertrand (ETW, 1999)

Optimal conditions for Boolean and current detection of floating gate faults. - Michel Renovell; André Ivanov; Yves Bertrand; Florence Azaïs; Sumbal Rafiq (ITC, 1999)

A Successful Distance-Learning Experience for IC Test Education. - Yves Bertrand; Florence Azaïs; Marie-Lise Flottes; Regis Lorival (MSE, 1999)

Detection of Defects Using Fault Model Oriented Test Sequences. - Michel Renovell; Florence Azaïs; Yves Bertrand (J. Electron. Test., 1999)

TI-BIST: a temperature independent analog BIST for switched-capacitor filters. - Luigi Carro; Érika F. Cota; Marcelo Lubaszewski; Yves Bertrand; Florence Azaïs; Michel Renovell (Asian Test Symposium, 2000)

Reuse of Existing Resources for Analog BIST of a Switch Capacitor Filte. - Érika F. Cota; Michel Renovell; Florence Azaïs; Yves Bertrand; Luigi Carro; Marcelo Lubaszewski (DATE, 2000)

Towards an ADC BIST scheme using the histogram test technique. - Florence Azaïs; Serge Bernard; Y. Betrand; Michel Renovell (ETW, 2000)

Minimizing the Hardware Overhead of a Histogram-Based BIST Scheme for Analog-to-Digital Converters. - Serge Bernard; Florence Azaïs; Yves Bertrand; Michel Renovell (LATW, 2000)

On the Temperature Dependencies of Analog BIST. - Luigi Carro; Michel Renovell; Érika F. Cota; Marcelo Lubaszewski; Yves Bertrand; Florence Azaïs (LATW, 2000)

Hardware Resource Minimization for Histogram-Based ADC BIST. - Michel Renovell; Florence Azaïs; Serge Bernard; Yves Bertrand (VTS, 2000)

Combining Functional and Structural Approaches for Switched-Current Circuit Testing. - Michel Renovell; Florence Azaïs; J.-C. Bodin; Yves Bertrand (J. Electron. Test., 2000)

Implementation of a linear histogram BIST for ADCs. - Florence Azaïs; Serge Bernard; Yves Bertrand; Michel Renovell (DATE, 2001)

Analog BIST Generator for ADC Testing. - Serge Bernard; Florence Azaïs; Yves Bertrand; Michel Renovell (DFT, 2001)

On-chip Generator of a Saw-Tooth Test Stimulus for ADC BIST. - Florence Azaïs; Serge Bernard; Yves Bertrand; Michel Renovell (VLSI-SOC, 2001)

Boolean and current detection of MOS transistor with gate oxide short. - Michel Renovell; Jean Marc Gallière; Florence Azaïs; Serge Bernard; Yves Bertrand (ITC, 2001)

On-Chip Generation of High-Quality Ramp Stimulus With Minimal Silicon Area. - Florence Azaïs; Serge Bernard; Yves Bertrand; Xavier Michel; Michel Renovell (LATW, 2001)

Electrical Analysis of Gate Oxide Short in MOS Technologies. - Michel Renovell; Jean Marc Gallière; Florence Azaïs; Yves Bertrand (LATW, 2001)

A Low-Cost Adaptive Ramp Generator for Analog BIST Applications. - Florence Azaïs; Serge Bernard; Yves Bertrand; Xavier Michel; Michel Renovell (VTS, 2001)

A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs. - Florence Azaïs; Serge Bernard; Yves Bertrand; Michel Renovell (J. Electron. Test., 2001)

Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST. - Florence Azaïs; Serge Bernard; Yves Bertrand; Michel Renovell (J. Electron. Test., 2001)

On the detectability of CMOS floating gate transistor faults. - André Ivanov; Sumbal Rafiq; Michel Renovell; Florence Azaïs; Yves Bertrand (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

European Network for Test Education. - Yves Bertrand; Marie-Lise Flottes; Florence Azaïs; Serge Bernard; Laurent Latorre; Regis Lorival (DELTA, 2002)

A high accuracy triangle-wave signal generator for on-chip ADC testing. - Serge Bernard; Florence Azaïs; Yves Bertrand; Michel Renovell (ETW, 2002)

Modeling gate oxide short defects in CMOS minimum transistors. - Michel Renovell; Jean Marc Gallière; Florence Azaïs; Yves Bertrand (ETW, 2002)

Estimating Static Parameters of A-to-D Converters from Spectral Analysis. - Florence Azaïs; Serge Bernard; Yves Bertrand; Mariane Comte; Michel Renovell; Marcelo Lubaszewski (LATW, 2002)

Improving Defect Detection in Static-Voltage Testing. - Michel Renovell; Florence Azaïs; Yves Bertrand (IEEE Des. Test Comput., 2002)

Delay Testing of MOS Transistor with Gate Oxide Short. - Michel Renovell; Jean Marc Gallière; Florence Azaïs; Yves Bertrand (Asian Test Symposium, 2003)

A New Methodology For ADC Test Flow Optimization. - Serge Bernard; Mariane Comte; Florence Azaïs; Yves Bertrand; Michel Renovell (ITC, 2003)

An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs. - Florence Azaïs; Yves Bertrand; Michel Renovell; André Ivanov; Sassan Tabatabaei (IEEE Des. Test Comput., 2003)

Extending IEEE Std. 1149.4 Analog Boundary Modules to Enhance Mixed-Signal Test. - Uros Kac; Franc Novak; Florence Azaïs; Pascal Nouet; Michel Renovell (IEEE Des. Test Comput., 2003)

On-Chip Generation of Ramp and Triangle-Wave Stimuli for ADC BIST. - Serge Bernard; Florence Azaïs; Yves Bertrand; Michel Renovell (J. Electron. Test., 2003)

Modeling the Random Parameters Effects in a Non-Split Model of Gate Oxide Short. - Michel Renovell; Jean Marc Gallière; Florence Azaïs; Yves Bertrand (J. Electron. Test., 2003)

A-to-D converters static error detection from dynamic parameter measurement. - Florence Azaïs; Serge Bernard; Yves Bertrand; Mariane Comte; Michel Renovell (Microelectron. J., 2003)

Analysis and Attenuation Proposal in Ground Bounce. - Antonio Zenteno; Víctor H. Champac; Michel Renovell; Florence Azaïs (Asian Test Symposium, 2004)

Electrically-induced thermal stimuli for MEMS testing. - Norbert Dumas; Florence Azaïs; Laurent Latorre; Pascal Nouet (ETS, 2004)

Testing the Configurable Analog Blocks of Field Programmable Analog Arrays. - Tiago R. Balen; Antonio Andrade Jr.; Florence Azaïs; Michel Renovell; Marcelo Lubaszewski (ITC, 2004)

An Approach to the Built-In Self-Test of Field Programmable Analog Arrays. - Tiago R. Balen; Antonio Andrade Jr.; Florence Azaïs; Marcelo Lubaszewski; Michel Renovell (VTS, 2004)

Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure. - Florence Azaïs; Serge Bernard; Yves Bertrand; Mariane Comte; Michel Renovell (J. Electron. Test., 2004)

Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors. - Serge Bernard; Mariane Comte; Florence Azaïs; Yves Bertrand; Michel Renovell (J. Electron. Test., 2004)

Automated Diagnosis and Probing Flow for Fast Fault Localization in IC. - D. Martin; Romain Desplats; Gérald Haller; Pascal Nouet; Florence Azaïs (Microelectron. Reliab., 2004)

Towards on-line testing of MEMS using electro-thermal excitation. - Frédérick Mailly; Florence Azaïs; Norbert Dumas; Laurent Latorre; Pascal Nouet (ETS, 2005)

On-Chip Electro-Thermal Stimulus Generation for a MEMS-Based Magnetic Field Sensor. - Norbert Dumas; Florence Azaïs; Laurent Latorre; Pascal Nouet (VTS, 2005)

Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays. - Gustavo Pereira; Antonio Andrade Jr.; Tiago R. Balen; Marcelo Lubaszewski; Florence Azaïs; Michel Renovell (VTS, 2005)

Efficiency of Optimized Dynamic Test Flows for ADCs: Sensitivity to Specifications. - Florence Azaïs; Serge Bernard; Yves Bertrand; Mariane Comte; Michel Renovell (J. Electron. Test., 2005)

A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters. - Florence Azaïs; Marcelo Lubaszewski; Pascal Nouet; Michel Renovell (J. Electron. Test., 2005)

Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks. - Tiago R. Balen; Antonio Q. Andrade; Florence Azaïs; Marcelo Lubaszewski; Michel Renovell (J. Electron. Test., 2005)

Delay Testing Viability of Gate Oxide Short Defects. - Jean Marc Gallière; Michel Renovell; Florence Azaïs; Yves Bertrand (J. Comput. Sci. Technol., 2005)

Built-in self-test of global interconnects of field programmable analog arrays. - Antonio Andrade Jr.; Gustavo Vieira; Tiago R. Balen; Marcelo Lubaszewski; Florence Azaïs; Michel Renovell (Microelectron. J., 2005)

A new multi-finger SCR-based structure for efficient on-chip ESD protection. - Florence Azaïs; B. Caillard; S. Dournelle; P. Salomé; Pascal Nouet (Microelectron. Reliab., 2005)

A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs. - Vincent Kerzerho; Philippe Cauvet; Serge Bernard; Florence Azaïs; Mariane Comte; Michel Renovell (IEEE Des. Test Comput., 2006)

Electro-thermal Stimuli for MEMS Testing in FSBM Technology. - Norbert Dumas; Florence Azaïs; Laurent Latorre; Pascal Nouet (J. Electron. Test., 2006)

Electro-thermal short pulsed simulation for SOI technology. - Christophe Entringer; Philippe Flatresse; Philippe Galy; Florence Azaïs; Pascal Nouet (Microelectron. Reliab., 2006)

Impact of Simultaneous Switching Noise on the Static behavior of Digital CMOS Circuits. - Florence Azaïs; Laurent Larguier; Michel Renovell (ATS, 2007)

"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC. - Vincent Kerzerho; Philippe Cauvet; Serge Bernard; Florence Azaïs; Mariane Comte; Michel Renovell (ETS, 2007)

Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC. - Vincent Kerzerho; Philippe Cauvet; Serge Bernard; Florence Azaïs; Mariane Comte; Michel Renovell (IET Comput. Digit. Tech., 2007)

A novel method for test and calibration of capacitive accelerometers with a fully electrical setup. - Norbert Dumas; Florence Azaïs; Frédérick Mailly; Andrew Richardson 001; Pascal Nouet (DDECS, 2008)

On the Detection of SSN-Induced Logic Errors through On-Chip Monitoring. - Florence Azaïs; Laurent Larguier; Yves Bertrand; Michel Renovell (IOLTS, 2008)

ADC Production Test Technique Using Low-Resolution Arbitrary Waveform Generator. - Vincent Kerzerho; Philippe Cauvet; Serge Bernard; Florence Azaïs; Michel Renovell; Mariane Comte; Omar Chakib (VLSI Design, 2008)

Exploiting Zero-Crossing for the Analysis of FM Modulated Analog/RF Signals Using Digital ATE. - Nicolas Pous; Florence Azaïs; Laurent Latorre; Pascal Nouet; Jochen Rivoir (Asian Test Symposium, 2009)

An analysis of the timing behavior of CMOS digital blocks under Simultaneous Switching Noise conditions. - Florence Azaïs; Yves Bertrand; Michel Renovell (DDECS, 2009)

A multi-converter DFT technique for complex SIP: Concepts and validation. - Vincent Kerzerho; Philippe Cauvet; Serge Bernard; Florence Azaïs; Mariane Comte; Michel Renovell (ECCTD, 2009)

Characterization of the transient behavior of gated/STI diodes and their associated BJT in the CDM time domain. - Jean-Robert Manouvrier; Pascal Fonteneau; Charles-Alexandre Legrand; Pascal Nouet; Florence Azaïs (Microelectron. Reliab., 2009)

On the use of standard digital ATE for the analysis of RF signals. - Nicolas Pous; Florence Azaïs; Laurent Latorre; Jochen Rivoir (ETS, 2010)

Experiments on the analysis of phase/frequency-modulated RF signals using digital tester channels. - Nicolas Pous; Florence Azaïs; Laurent Latorre; Pascal Nouet; Jochen Rivoir (LATW, 2010)

Study of an Electrical Setup for Capacitive MEMS Accelerometers Test and Calibration. - Norbert Dumas; Florence Azaïs; Frédérick Mailly; Pascal Nouet (J. Electron. Test., 2010)

An electrical test method for MEMS convective accelerometers: Development and evaluation. - Ahmed Amine Rekik; Florence Azaïs; Norbert Dumas; Frédérick Mailly; Pascal Nouet (DATE, 2011)

Test and calibration of MEMS convective accelerometers with a fully electrical setup. - Ahmed Amine Rekik; Florence Azaïs; Norbert Dumas; Frédérick Mailly; Pascal Nouet (LATW, 2011)

Digital Test Method for Embedded Converters with Unknown-Phase Harmonics. - Vincent Kerzerho; Mariane Comte; Florence Azaïs; Philippe Cauvet; Serge Bernard; Michel Renovell (J. Electron. Test., 2011)

A Level-Crossing Approach for the Analysis of RF Modulated Signals Using Only Digital Test Resources. - Nicolas Pous; Florence Azaïs; Laurent Latorre; Jochen Rivoir (J. Electron. Test., 2011)

A Behavioral Model of MEMS Convective Accelerometers for the Evaluation of Design and Calibration Strategies at System Level. - Ahmed Amine Rekik; Florence Azaïs; Norbert Dumas; Frédérick Mailly; Pascal Nouet (J. Electron. Test., 2011)

Making predictive analog/RF alternate test strategy independent of training set size. - Haithem Ayari; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Olivier Potin; Michel Renovell (ITC, 2012)

Design-for-manufacturability of MEMS convective accelerometers through adaptive electrical calibration strategy. - Ahmed Amine Rekik; Florence Azaïs; Frédérick Mailly; Pascal Nouet (LATW, 2012)

Low-cost SNR estimation of analog signals using standard digital automated test equipment (ATE). - Florence Azaïs; Laurent Latorre (NEWCAS, 2012)

Smart selection of indirect parameters for DC-based alternate RF IC testing. - Haithem Ayari; Florence Azaïs; Serge Bernard; Mariane Comte; Michel Renovell; Vincent Kerzerho; Olivier Potin; Christophe Kelma (VTS, 2012)

MIRID: Mixed-Mode IR-Drop Induced Delay Simulator. - Jie Jiang 018; Marina Aparicio; Mariane Comte; Florence Azaïs; Michel Renovell; Ilia Polian (Asian Test Symposium, 2013)

Implementing model redundancy in predictive alternate test to improve test confidence. - Haithem Ayari; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Olivier Potin; Michel Renovell (ETS, 2013)

Pre-characterization procedure for a mixed mode simulation of IR-drop induced delays. - Marina Aparicio; Mariane Comte; Florence Azaïs; Michel Renovell; Jie Jiang 018; Ilia Polian; Bernd Becker 001 (LATW, 2013)

Accurate and efficient analytical electrical model of antenna for NFC applications. - Mouhamadou Dieng; Mariane Comte; Serge Bernard; Vincent Kerzerho; Florence Azaïs; Michel Renovell; Thibault Kervaon; Paul-Henri Pugliesi-Conti (NEWCAS, 2013)

A novel implementation of the histogram-based technique for measurement of INL of LUT-based correction of ADC. - Vincent Kerzerho; Serge Bernard; Florence Azaïs; Mariane Comte; Olivier Potin; Chuan Shan; G. Bontorin; Michel Renovell (Microelectron. J., 2013)

New implementions of predictive alternate analog/RF test with augmented model redundancy. - Haithem Ayari; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Michel Renovell (DATE, 2014)

Solutions for the self-adaptation of communicating systems in operation. - Martin Andraud; Anthony Deluthault; Mouhamadou Dieng; Florence Azaïs; Serge Bernard; Philippe Cauvet; Mariane Comte; Thibault Kervaon; Vincent Kerzerho; Salvador Mir; Paul-Henri Pugliesi-Conti; Michel Renovell; et al. (IOLTS, 2014)

Low-cost phase noise testing of complex RF ICs using standard digital ATE. - Stephane David-Grignot; Florence Azaïs; Laurent Latorre; Francois Lefevre (ITC, 2014)

Evaluation of indirect measurement selection strategies in the context of analog/RF alternate testing. - Syhem Larguech; Florence Azaïs; Serge Bernard; Vincent Kerzerho; Mariane Comte; Michel Renovell (LATW, 2014)

Phase noise measurement on IF analog signals using standard digital ATE resources. - Stephane David-Grignot; Florence Azaïs; Laurent Latorre; Francois Lefevre (NEWCAS, 2014)

Study of Low-Cost Electrical Test Strategies for Post-Silicon Yield Improvement of MEMS Convective Accelerometers. - Ahmed Amine Rekik; Florence Azaïs; Frédérick Mailly; Pascal Nouet (J. Electron. Test., 2014)

Testing for gate oxide short defects using the detectability interval paradigm. - Jean-Marc Gallière; Florence Azaïs; Mariane Comte; Michel Renovell (it Inf. Technol., 2014)

Enhancing confidence in indirect analog/RF testing against the lack of correlation between regular parameters and indirect measurements. - Haithem Ayari; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Michel Renovell (Microelectron. J., 2014)

Embedded Test Instrument for On-Chip Phase Noise Evaluation of Analog/IF Signals. - Florence Azaïs; Stephane David-Grignot; Laurent Latorre; Francois Lefevre (DDECS, 2015)

Analog test: Why still "à la mode" after more than 25 years of research? - Florence Azaïs (ETS, 2015)

A new technique for low-cost phase noise production testing from 1-bit signal acquisition. - Stephane David-Grignot; Florence Azaïs; Laurent Latorre; Francois Lefevre (ETS, 2015)

Toward Adaptation of ADCs to Operating Conditions through On-chip Correction. - Vincent Kerzerho; Ludovic Guillaume-Sage; Florence Azaïs; Mariane Comte; Michel Renovell; Serge Bernard (ISVLSI, 2015)

A Framework for Efficient Implementation of Analog/RF Alternate Test with Model Redundancy. - Syhem Larguech; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Michel Renovell (ISVLSI, 2015)

A digital technique for the evaluation of SSB phase noise of analog/RF signals. - Florence Azaïs; Stephane David-Grignot; Laurent Latorre; Francois Lefevre (LATS, 2015)

Special session: Hot topics: Statistical test methods. - Manuel J. Barragán; Gildas Léger; Florence Azaïs; Ronald D. Blanton; Adit D. Singh; Stephen Sunter (VTS, 2015)

Phase Noise Testing of Analog/IF Signals Using Digital ATE: A New Post-Processing Algorithm for Extended Measurement Range. - Stephane David-Grignot; Florence Azaïs; Laurent Latorre; Francois Lefevre (J. Electron. Test., 2015)

Efficiency evaluation of analog/RF alternate test: Comparative study of indirect measurement selection strategies. - Syhem Larguech; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Michel Renovell (Microelectron. J., 2015)

Impact of VT and Body-Biasing on Resistive Short Detection in 28nm UTBB FDSOI - LVT and RVT Configurations. - Amit Karel; Mariane Comte; Jean-Marc Gallière; Florence Azaïs; Michel Renovell (ISVLSI, 2016)

Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect. - Amit Karel; Mariane Comte; Jean-Marc Gallière; Florence Azaïs; Michel Renovell (LATS, 2016)

SSB Phase Noise Evaluation of Analog/IF Signals on Standard Digital ATE. - Florence Azaïs; Stephane David-Grignot; Laurent Latorre; Francois Lefevre (J. Electron. Test., 2016)

Digital Embedded Test Instrument for On-Chip Phase Noise Testing of Analog/RF Integrated Circuits. - Florence Azaïs; Stephane David-Grignot; Laurent Latorre; Francois Lefevre (J. Circuits Syst. Comput., 2016)

Detection of resistive open and short defects in FDSOI under delay-based test: Optimal VDD and body biasing conditions. - Amit Karel; Florence Azaïs; Mariane Comte; Jean-Marc Gallière; Michel Renovell; Keshav Singh (ETS, 2017)

Comprehensive Study for Detection of Weak Resistive Open and Short Defects in FDSOI Technology. - Amit Karel; Florence Azaïs; Mariane Comte; Jean-Marc Gallière; Michel Renovell; Keshav Singh (ISVLSI, 2017)

Resistive Bridging Defect Detection in Bulk, FDSOI and FinFET Technologies. - Amit Karel; Mariane Comte; Jean-Marc Gallière; Florence Azaïs; Michel Renovell (J. Electron. Test., 2017)

Low-cost functional test of a 2.4 GHz OQPSK transmitter using standard digital ATE. - T. Vayssade; Florence Azaïs; Laurent Latorre; Francois Lefevre (IOLTS, 2018)

Impact of process variations on the detectability of resistive short defects: Comparative analysis between 28nm Bulk and FDSOI technologies. - Amit Karel; Florence Azaïs; Mariane Comte; Jean-Marc Gallière; Michel Renovell (LATS, 2018)

On-chip Generation of Sine-wave Summing Digital Signals: an Analytic Study Considering Implementation Constraints. - Stephane David-Grignot; Achraf Lamlih; Mohamed Moez Belhaj; Vincent Kerzerho; Florence Azaïs; Fabien Soulier; Philippe Freitas; Tristan Rouyer; Sylvain Bonhommeau; Serge Bernard (J. Electron. Test., 2018)

Power Measurement and Spectral Test of ZigBee Transmitters from 1-bit Under-sampled Acquisition. - T. Vayssade; Florence Azaïs; Laurent Latorre; Francois Lefevre (ETS, 2019)

Use of ensemble methods for indirect test of RF circuits: can it bring benefits? - Hassan El Badawi; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Francois Lefevre (LATS, 2019)

Which metrics to use for RF indirect test strategy? - Hassan El Badawi; Mariane Comte; Florence Azaïs; Vincent Kerzèrho; Serge Bernard; François Lefevre (SMACD, 2019)

Analytical Models for the Evaluation of Resistive Short Defect Detectability in Presence of Process Variations: Application to 28nm Bulk and FDSOI Technologies. - Amit Karel; Florence Azaïs; Mariane Comte; Jean-Marc Gallière; Michel Renovell (J. Electron. Test., 2019)

EVM measurement of RF ZigBee transceivers using standard digital ATE. - T. Vayssade; Florence Azaïs; Laurent Latorre; François Lefevre (DFT, 2020)

Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs. - Florence Azaïs; Serge Bernard; Mariane Comte; Bastien Deveautour; Sophie Dupuis; Hassan El Badawi; Marie-Lise Flottes; Patrick Girard 001; Vincent Kerzèrho; Laurent Latorre; François Lefèvre; Bruno Rouzeyre; et al. (IOLTS, 2020)

Implementing indirect test of RF circuits without compromising test quality: a practical case study. - Hassan El Badawi; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzèrho; Francois Lefevre; I. Gorenflot (LATS, 2020)

Investigations on the Use of Ensemble Methods for Specification-Oriented Indirect Test of RF Circuits. - Hassan El Badawi; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Francois Lefevre (J. Electron. Test., 2020)

Digital test of ZigBee transmitters: Validation in industrial test environment. - Thibault Vayssade; Florence Azaïs; Laurent Latorre; François Lefèvre (DATE, 2021)

Exploration of a digital-based solution for the generation of 2.4GHz OQPSK test stimuli. - Thibault Vayssade; Mouhamad Chehaitly; Florence Azaïs; Laurent Latorre; François Lefèvre (ETS, 2021)

Exploring on-line RF performance monitoring based on the indirect test strategy. - Hassan El Badawi; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzèrho; François Lefèvre (LATS, 2021)

Evaluation of a Two-Tier Adaptive Indirect Test Flow for a Front-End RF Circuit. - Hassan El Badawi; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Francois Lefevre (J. Electron. Test., 2021)

Low-Cost EVM Measurement of ZigBee Transmitters From 1-bit Undersampled Acquisition. - T. Vayssade; Florence Azaïs; Laurent Latorre; François Lefèvre (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Leveraging Layout-based Effects for Locking Analog ICs. - Muayad J. Aljafar; Florence Azaïs; Marie-Lise Flottes; Samuel Pagliarini (ASHES@CCS, 2022)

Low-cost digital solution for production test of ZigBee transmitters Special Session "AMS-RF testing". - Thibault Vayssade; Florence Azaïs; Laurent Latorre; François Lefèvre (LATS, 2023)

On the Use of the Indirect Test Strategy for Lifetime Performance Monitoring of RF Circuits. - Hassan El Badawi; Florence Azaïs; Serge Bernard; Mariane Comte; Vincent Kerzerho; Francois Lefevre (J. Electron. Test., 2023)

Low-cost generation of RF test stimuli from baseband digital signals. - Kamilia Tahraoui; T. Vayssade; François Lefèvre; Laurent Latorre; Florence Azaïs (ATS, 2024)

Digital Generation of RF Phase-Modulated Test Stimuli: Application to BPSK Modulation Scheme. - Kamilia Tahraoui; R. Burelle; T. Vayssade; François Lefevre; Laurent Latorre; Florence Azaïs (DFT, 2024)

Low-Resource Fully-Digital BPSK Demodulation Technique for Intra-Body Wireless Sensor Networks. - Stéphane Pitou; Florence Azaïs; Serge Bernard; Tristan Rouyer; Fabien Soulier; Vincent Kerzerho (I2MTC, 2024)

Logic Locking: Exploration of a new key-gate based on tristate logic. - Sophie Dupuis; Nassim Riadi; Clémy Moroukian; Florence Azaïs; Marie-Lise Flottes (LATS, 2024)

Digital generation of single tone FM/PM test stimuli: a theoretical analysis. - Kamilia Tahraoui; T. Vayssade; François Lefèvre; Laurent Latorre; Florence Azaïs (LATS, 2024)

Utilizing layout effects for analog logic locking. - Muayad J. Aljafar; Florence Azaïs; Marie-Lise Flottes; Samuel Pagliarini (J. Cryptogr. Eng., 2024)

Digital-Based Solution for the Generation of FM/PM Test Stimuli. - Kamilia Tahraoui; Thibault Vayssade; François Lefevre; Laurent Latorre; Florence Azaïs (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Cost-Effective Analytical Models of Resistive Opens Defects in FinFET Technology. - Gustavo Aguirre; Freddy Forero; Víctor H. Champac; Michel Renovell; Florence Azaïs; Mariane Comte; Jean-Marc Gallière (IEEE Trans. Very Large Scale Integr. Syst., 2025)