Partial and dynamic reconfiguration of FPGAs: a top down design methodology for an automatic implementation. - Florent Berthelot; Fabienne Nouvel; Dominique Houzet (IPDPS, 2006)

Partial and Dynamic Reconfiguration of FPGAs: a top down design methodology for an automatic implementation. - Florent Berthelot; Fabienne Nouvel (ISVLSI, 2006)

A Flexible System Level Design Methodology Targeting Run-Time Reconfigurable FPGAs. - Florent Berthelot; Fabienne Nouvel; Dominique Houzet (EURASIP J. Embed. Syst., 2008)

Design Methodology for a High Performance Robust DVB-S2 Decoder Implementation. - Florent Berthelot; François Charot; Charles Wagner; Christophe Wolinski (DSD, 2010)