An expert-system paradigm for design. - Forrest Brewer; Daniel Gajski (DAC, 1986)

Knowledge Based Control in Micro-Architecture Design. - Forrest Brewer; Daniel Gajski (DAC, 1987)

Constraint Driven Behavioral Synthesis - Forrest Brewer (1988)

Interconnection synthesis with geometric constraints. - Forrest Brewer; Barry M. Pangrle; Andrew Seawright (MICRO, 1990)

Chippe: a system for constraint driven behavioral synthesis. - Forrest Brewer; Daniel D. Gajski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Relevant Issues in High-Level Connectivity Synthesis. - Barry M. Pangrle; Forrest Brewer; Donald A. Lobo; Andrew Seawright (DAC, 1991)

DISC: Dynamic Instruction Stream Computer. - Mario Nemirovsky; Forrest Brewer; Roger C. Wood (MICRO, 1991)

Synthesis from Production-Based Specifications. - Andrew Seawright; Forrest Brewer (DAC, 1992)

Interface constrained processor specification and scheduling. - Jack Greenbaum; Forrest Brewer (Great Lakes Symposium on VLSI, 1992)

High performance data-path synthesis via communication metrics. - Andrew Seawright; Forrest Brewer (Great Lakes Symposium on VLSI, 1992)

High-Level Symbolic Construction Technique for High Performance Sequential Synthesis. - Andrew Seawright; Forrest Brewer (DAC, 1993)

Incorporating Speculative Execution in Exact Control-Dependent Scheduling. - Ivan P. Radivojevic; Forrest Brewer (DAC, 1994)

Ensemble representation and techniques for exact control-dependent scheduling. - Ivan P. Radivojevic; Forrest Brewer (HLSS, 1994)

Clairvoyant: a synthesis system for production-based specification. - Andrew Seawright; Forrest Brewer (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Symbolic Modeling and Evaluation of Data Paths. - Chuck Monahan; Forrest Brewer (DAC, 1995)

On applicability of symbolic techniques to larger scheduling problems. - Ivan P. Radivojevic; Forrest Brewer (ED&TC, 1995)

Symbolic execution of data paths. - Chuck Monahan; Forrest Brewer (Great Lakes Symposium on VLSI, 1995)

Analysis of conditional resource sharing using a guard-based control representation. - Ivan P. Radivojevic; Forrest Brewer (ICCD, 1995)

Symbolic Scheduling Techniques. - Ivan P. Radivojevic; Forrest Brewer (IEICE Trans. Inf. Syst., 1995)

Concurrent Analysis Techniques for Data Path Timing Optimization. - Chuck Monahan; Forrest Brewer (DAC, 1996)

Implementation of an Efficient Parallel BDD Package. - Tony Stornetta; Forrest Brewer (DAC, 1996)

Controller optimization for protocol intensive applications. - Andrew Crews; Forrest Brewer (EURO-DAC, 1996)

Clock skew optimization for ground bounce control. - Ashok Vittal; Hein Ha; Forrest Brewer; Malgorzata Marek-Sadowska (ICCAD, 1996)

A new symbolic technique for control-dependent scheduling. - Ivan P. Radivojevic; Forrest Brewer (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Scheduling and binding bounds for RT-level symbolic execution. - Chuck Monahan; Forrest Brewer (ICCAD, 1997)

Efficient encoding for exact symbolic automata-based scheduling. - Steve Haynal; Forrest Brewer (ICCAD, 1998)

A Model for Scheduling Protocol-Constrained Components and Environments. - Steve Haynal; Forrest Brewer (DAC, 1999)

Shape-based sequential machine analysis. - Andrew Crews; Forrest Brewer (ISCAS (1), 1999)

Power and signal integrity improvement in ultra high-speed current mode logic. - Hien Ha; Forrest Brewer (ISCAS (1), 1999)

Representing and Scheduling Looping Behavior Symbolically. - Steve Haynal; Forrest Brewer (ICCD, 2000)

AQUILA: An Equivalence Checking System for Large Sequential Designs. - Shi-Yu Huang; Kwang-Ting Cheng; Kuang-Chien Chen; Chung-Yang Huang; Forrest Brewer (IEEE Trans. Computers, 2000)

Automata-Based Symbolic Scheduling for Looping DFGs. - Steve Haynal; Forrest Brewer (IEEE Trans. Computers, 2001)

Coping with buffer delay change due to power and ground noise. - Lauren Hui Chen; Malgorzata Marek-Sadowska; Forrest Brewer (DAC, 2002)

Symbolic NFA scheduling of a RISC microprocessor. - Forrest Brewer; Steve Haynal (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Nano, quantum, and molecular computing: are we ready for the validation and test challenges? - Sandeep K. Shukla; Ramesh Karri; Seth Copen Goldstein; Forrest Brewer; Kaustav Banerjee; Sankar Basu (HLDVT, 2003)

Buffer delay change in the presence of power and ground noise. - Lauren Hui Chen; Malgorzata Marek-Sadowska; Forrest Brewer (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Structural search for RTL with predicate learning. - Ganapathy Parthasarathy; Madhu K. Iyer; Kwang-Ting Cheng; Forrest Brewer (DAC, 2005)

Wirelength optimization by optimal block orientation. - Xin Hao; Forrest Brewer (ICCAD, 2005)

RTL SAT simplification by Boolean and interval arithmetic reasoning. - Ganapathy Parthasarathy; Madhu K. Iyer; Kwang-Ting Cheng; Forrest Brewer (ICCAD, 2005)

Weighted control scheduling. - Aravind Vijayakumar; Forrest Brewer (ICCAD, 2005)

PyPBS design and methodologies. - Greg Hoover; Forrest Brewer (MEMOCODE, 2005)

Extensible control architectures. - Greg Hoover; Forrest Brewer; Timothy Sherwood (CASES, 2006)

A case study of multi-threading in the embedded space. - Greg Hoover; Forrest Brewer; Timothy Sherwood (CASES, 2006)

Layout driven data communication optimization for high level synthesis. - Ryan Kastner; Wenrui Gong; Xin Hao; Forrest Brewer; Adam Kaplan; Philip Brisk; Majid Sarrafzadeh (DATE, 2006)

Towards understanding architectural tradeoffs in MEMS closed-loop feedback control. - Greg Hoover; Forrest Brewer; Timothy Sherwood (CASES, 2007)

MEMOCODE 2007 Co-Design Contest. - Forrest Brewer; James C. Hoe (MEMOCODE, 2007)

Computationally efficient methods for digital control. - Duarte Antunes; João Pedro Hespanha; Carlos Jorge Ferreira Silvestre; Nitin Kataria; Forrest Brewer (CDC, 2008)

Synthesizing Synchronous Elastic Flow Networks. - Greg Hoover; Forrest Brewer (DATE, 2008)

Pulse-mode link for robust, high speed communications. - Merritt Miller; Greg Hoover; Forrest Brewer (ISCAS, 2008)

Latency-Insensitive Hardware/Software Interfaces. - Greg Hoover; Forrest Brewer; Chris Gill 001 (MEMOCODE, 2008)

Advances in ESL Design. - Rajesh Gupta 001; Arvind 001; Gérard Berry; Forrest Brewer (IEEE Des. Test Comput., 2008)

Structural integrity: safety in miniature technology. - Greg Hoover; Forrest Brewer; Timothy Sherwood (SIGBED Rev., 2008)

Control design for force balance sensors. - Zi Yie; Nitin Kataria; Chris Burgner; Karl Åström 001; Forrest Brewer; Kimberly L. Turner (ACC, 2009)

2009 MEMOCODE Co-Design Contest. - Forrest Brewer; James C. Hoe (MEMOCODE, 2009)

Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems. - Nitin Kataria; Forrest Brewer; João Pedro Hespanha; Timothy Sherwood (J. Low Power Electron., 2009)

A Methodology for Optimal MAC Protocol Generation: Case Study of a Synchronous MAC Channel. - Jian Zhen; Forrest Brewer; Volkan Rodoplu (GLOBECOM, 2010)

Design contest overview: Combined architecture for network stream categorization and intrusion detection (CANSCID). - Michael Pellauer; Abhinav Agarwal; Asif Khan 005; Man Cheuk Ng; Muralidaran Vijayaraghavan; Forrest Brewer; Joel S. Emer (MEMOCODE, 2010)

Automated MAC Protocol Generation with Multiple Neighborhoods and Acknowledgments Based on Symbolic Monte Carlo Simulation. - Jian Zhen; Forrest Brewer; Volkan Rodoplu (GLOBECOM, 2011)

A hierarchical Ant-Colony heuristic for architecture synthesis for on-chip communication. - Wei Tang; Forrest Brewer (DASIP, 2013)

Formal verification of analog circuit parameters across variation utilizing SAT. - Merritt Miller; Forrest Brewer (DATE, 2013)

Ongoing challenges in automated cyberphysical cross-domain design. - Kunal Arya; Joseph Poverelli; Forrest Brewer (ICNC, 2013)

Asynchronous High Speed Serial Links Analysis using Integrated Charge for Event Detection. - Aditya Dalakoti; Carrie Segal; Merritt Miller; Forrest Brewer (ACM Great Lakes Symposium on VLSI, 2016)

Connectivity Effects on Energy and Area for Neuromorphic System with High Speed Asynchronous Pulse Mode Links. - Carrie Segal; Aditya Dalakoti; Merritt Miller; Forrest Brewer (SLIP, 2016)

A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach. - Vishnuram Abhinav; Dheeraj Kumar Sinha; Amitabh Chatterjee; Forrest Brewer (VLSID, 2016)

Pulse Ring Oscillator Tuning via Pulse Dynamics. - Aditya Dalakoti; Merritt Miller; Forrest Brewer (ICCD, 2017)

High performance pulse ring voltage controlled oscillator for Internet of Things. - Aditya Dalakoti; Merritt Miller; Forrest Brewer (ISOCC, 2017)

Low phase noise pulse rotary wave voltage controlled oscillator. - Merritt Miller; Aditya Dalakoti; Prashansa Mukim; Forrest Brewer (ISOCC, 2017)

Design and analysis of high performance pulse ring VCO. - Aditya Dalakoti; Merritt Miller; Forrest Brewer (NORCAS, 2017)

Low Complexity and Critical Path Based VLSI Architecture for LMS Adaptive Filter Using Distributed Arithmetic. - Mohd. Tasleem Khan; Shaik Rafi Ahamed; Forrest Brewer (VLSID, 2017)

Impolite High Speed Interfaces with Asynchronous Pulse Logic. - Merritt Miller; Carrie Segal; David McCarthy; Aditya Dalakoti; Prashansa Mukim; Forrest Brewer (ACM Great Lakes Symposium on VLSI, 2018)

Direct ΣΔ Bitstream Processing for High Performance Feedback Control. - Joseph Poverelli; Forrest Brewer (CCTA, 2019)

Distributed Pulse Rotary Traveling Wave VCO: Architecture and Design. - Prashansa Mukim; Aditya Dalakoti; David McCarthy; Brandon Pon; Carrie Segal; Merritt Miller; James F. Buckwalter; Forrest Brewer (ISVLSI, 2019)

Design and Analysis of Collective Pulse Oscillators. - Prashansa Mukim; Aditya Dalakoti; David McCarthy; Carrie Segal; Merritt Miller; James F. Buckwalter; Forrest Brewer (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Multiwire Phase Encoding: A Signaling Strategy for High-Bandwidth, Low-Power Data Movement. - Prashansa Mukim; Forrest Brewer (IEEE Trans. Very Large Scale Integr. Syst., 2021)