Enabling multimedia applications for factory automation. - Chwan-Hwa John Wu; J. David Irwin; Fa Foster Dai (IEEE Trans. Ind. Electron., 2001)

A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications. - John W. M. Rogers; Mark S. Cavin; Fa Foster Dai; David G. Rahn (ESSCIRC, 2003)

A novel DDS architecture using nonlinear ROM addressing with improved compression ratio and quantisation noise. - Malinky Ghosh; Lakshmi S. J. Chimakurthy; Foster F. Dai; Richard C. Jaeger (ISCAS (2), 2004)

Delay analysis and optimal biasing for high speed low power Current Mode Logic circuits. - Vasanth Kakani; Foster F. Dai; Richard C. Jaeger (ISCAS (2), 2004)

Automatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer. - Foster F. Dai; Charles E. Stroud; Dayu Yang; Shuying Qi (ITC, 2004)

Integrated blind electronic equalizer for fiber dispersion compensation. - Foster F. Dai; Shengfang Wei; Richard C. Jaeger (ISCAS (6), 2005)

An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networks. - Vasanth Kakani; Foster F. Dai; Richard C. Jaeger (ISCAS (2), 2005)

Built-in self-test for automatic analog frequency response measurement. - Dayu Yang; Foster F. Dai; Charles E. Stroud (ISCAS (3), 2005)

A novel low-power input-independent MOS AC/DC charge pump. - Yuan Yao; Yin Shi; Foster F. Dai (ISCAS (1), 2005)

2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer. - Xuefeng Yu; Foster F. Dai; Yin Shi; Ronghua Zhu (ISCAS (5), 2005)

A fully integrated multiband MIMO WLAN transceiver RFIC. - David G. Rahn; Mark S. Cavin; Fa Foster Dai; Neric H. W. Fong; Richard Griffith; José Macedo; A. David Moore; John W. M. Rogers; Mike Toner (IEEE J. Solid State Circuits, 2005)

A multiband ΔΣ fractional-N frequency synthesizer for a MIMO WLAN transceiver RFIC. - John W. M. Rogers; Foster F. Dai; Mark S. Cavin; David G. Rahn (IEEE J. Solid State Circuits, 2005)

A 12-bit 300 MHz CMOS DAC for high-speed system applications. - Weining Ni; Xueyang Geng; Yin Shi; Foster F. Dai (ISCAS, 2006)

Analog frequency response measurement in mixed-signal systems. - Charles E. Stroud; Dayu Yang; Foster F. Dai (ISCAS, 2006)

A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver. - Oimins Xu; Xueqing Hu; Pens Gao; Jun Yan; Yin Shi; Foster F. Dai; Richard C. Jaeger (ISCAS, 2006)

A 12-bit current steering DAC for cryogenic applications. - Yuan Yao; Xuefeng Yu; Foster F. Dai; Richard C. Jaeger (ISCAS, 2006)

Design and Characterization of a 5.2 GHz/2.4 GHz ΣΔ Fractional-N Frequency Synthesizer for Low-Phase Noise Performance. - John W. M. Rogers; Foster F. Dai; Calvin Plett; Mark S. Cavin (EURASIP J. Wirel. Commun. Netw., 2006)

A direct digital frequency synthesizer with fourth-order phase domain ΔΣ noise shaper and 12-bit current-steering DAC. - Fa Foster Dai; Weining Ni; Yin Shi; Richard C. Jaeger (IEEE J. Solid State Circuits, 2006)

Automatic linearity and frequency response tests with built-in pattern generator and analyzer. - Foster F. Dai; Charles E. Stroud; Dayu Yang (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Noise Figure Measurement Using Mixed-Signal BIST. - Jie Qin; Charles E. Stroud; Foster F. Dai (ISCAS, 2007)

A 10-bit 2GHz Current-Steering CMOS D/A Converter. - Ling Yuan; Weining Ni; Yin Shi; Foster F. Dai (ISCAS, 2007)

FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems. - Jie Qin; Charles E. Stroud; Fa Foster Dai (IEEE Trans. Ind. Electron., 2007)

Session 5 - Broadband circuit techniques for emerging wireless communications. - Fa Foster Dai; Howard C. Luong (CICC, 2008)

Session 9 - Broadband circuit techniques for emerging wireless communications. - Fa Foster Dai; Howard C. Luong (CICC, 2008)

A multifunction transceiver RFIC for 802.11a/b/g WLAN and DVB-H applications. - Yin Shi; Foster F. Dai; Jun Yan; Xueqing Hu; Hua Xu; Ming Gu; Xuelian Zhang; Qiming Xu; Bei Chen; Fangxiong Chen; Peng Yu; Heping Ma; et al. (CICC, 2008)

A fully integrated zero-IF mobile TV tuner RFIC for S-band CMMB application. - Yin Shi; Fa Foster Dai; Jun Yan; Hua Xu; Xuelian Zhang; Heping Ma; Fang Yuan; Xin Guan; Richard C. Jaeger (CICC, 2008)

An X/Ku-band frequency synthesizer using a 9-Bit quadrature DDS. - Xuefeng Yu; Fa Foster Dai; Dayu Yang; J. David Irwin; Richard C. Jaeger (CICC, 2008)

An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC. - Xueyang Geng; Xuefeng Yu; Fa Foster Dai; J. David Irwin; Richard C. Jaeger (ESSCIRC, 2008)

Design and Analysis of a Transversal Filter RFIC in SiGe Technology. - Vasanth Kakani; Fa Foster Dai (IEEE Des. Test Comput., 2008)

A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 µm SiGe BiCMOS Technology. - Xuefeng Yu; Fa Foster Dai; J. David Irwin; Richard C. Jaeger (IEEE J. Solid State Circuits, 2008)

A 12-Bit Cryogenic and Radiation-Tolerant Digital-to-Analog Converter for Aerospace Extreme Environment Applications. - Yuan Yao; Foster F. Dai; Richard C. Jaeger; John D. Cressler (IEEE Trans. Ind. Electron., 2008)

A 430MHz-2.15GHz fractional-N frequency synthesizer for DVB and ABS-S applications. - Peng Yu; Zheng Gong; Ming Gu; Yin Shi; Foster F. Dai (CICC, 2009)

Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems. - George J. Starr; Jie Qin; Bradley F. Dutton; Charles E. Stroud; Foster F. Dai; Victor P. Nelson (DFT, 2009)

A Fully Integrated 900-MHz Passive RFID Transponder Front End With Novel Zero-Threshold RF-DC Rectifier. - Yuan Yao; Jie Wu; Yin Shi; Foster F. Dai (IEEE Trans. Ind. Electron., 2009)

Delta-Sigma Modulation for Direct Digital Frequency Synthesis. - Dayu Yang; Foster F. Dai; Weining Ni; Yin Shi; Richard C. Jaeger (IEEE Trans. Very Large Scale Integr. Syst., 2009)

On-chip Jitter Measurement Using Vernier Ring Time-to-Digital Converter. - Jianjun Yu; Fa Foster Dai (Asian Test Symposium, 2010)

A CMOS programmable gain amplifier with a novel DC-offset cancellation technique. - Xiaojie Chu; Min Lin; Zheng Gong; Yin Shi; Fa Foster Dai (CICC, 2010)

A 3-dimensional Vernier ring time-to-digital converter in 0.13µm CMOS. - Jianjun Yu; Fa Foster Dai (CICC, 2010)

An X-Band Transformer-Coupled Varactor-Less Quadrature Current-Controlled Oscillator in 0.18 μm SiGe BiCMOS Technology. - Xueyang Geng; Fa Foster Dai (IEEE J. Solid State Circuits, 2010)

An 11-Bit 8.6 GHz Direct Digital Synthesizer MMIC With 10-Bit Segmented Sine-Weighted DAC. - Xueyang Geng; Fa Foster Dai; J. David Irwin; Richard C. Jaeger (IEEE J. Solid State Circuits, 2010)

24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 μ m SiGe BiCMOS Technology. - Xueyang Geng; Fa Foster Dai; J. David Irwin; Richard C. Jaeger (IEEE J. Solid State Circuits, 2010)

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology. - Jianjun Yu; Fa Foster Dai; Richard C. Jaeger (IEEE J. Solid State Circuits, 2010)

Effects of LO Phase and Amplitude Imbalances and Phase Noise on M -QAM Transceiver Performance. - Zhenqi Chen; Fa Foster Dai (IEEE Trans. Ind. Electron., 2010)

A 0.6V quadrature VCO with optimized capacitive coupling for phase noise reduction. - Feng Zhao; Fa Foster Dai (CICC, 2011)

A 3mW 8-Bit radiation-hardened-by-design DAC for ultra-wide temperature range from -180°C to 120°C. - Zhenqi Chen; Fa Foster Dai (ISCAS, 2011)

A 4.2-4.7GHz, 3.7mW digitally controlled oscillator RFIC. - Vasanth Kakani; Fa Foster Dai (ISCAS, 2011)

An X- and Ku-Band Wideband Recursive Receiver MMIC With Gain-Reuse. - Desheng Ma; Fa Foster Dai; Richard C. Jaeger; J. David Irwin (IEEE J. Solid State Circuits, 2011)

Selective Spectrum Analysis for Analog Measurements. - Jie Qin; Joseph Cali; Bradley F. Dutton; George J. Starr; Fa Foster Dai; Charles E. Stroud (IEEE Trans. Ind. Electron., 2011)

PLLs, VCOs, and dividers. - Fa Foster Dai; Howard C. Luong (CICC, 2012)

A single-chip x-band chirp radar MMIC with stretch processing. - Jianjun Yu; Feng Zhao; Joseph Cali; Desheng Ma; Xueyang Geng; Fa Foster Dai; J. David Irwin; Andre Aklian (CICC, 2012)

A 100MHz fifth-order low-pass gm-C filter using folded stages. - Xin Jin; Fa Foster Dai (IECON, 2012)

A harmonic rejection mixer in wideband transmitter. - Yuehai Jin; Fa Foster Dai (IECON, 2012)

Effect of CMOS device sizing on circuit noise performance. - Hossein Noori; Fa Foster Dai (IECON, 2012)

A 6th order zero capacitor spread 1MHz - 10MHz tunable CMOS active-RC low pass filter with fast tuning scheme. - Xin Jin; Fa Foster Dai (ISCAS, 2012)

Remedies for noise degradation due to active Q-Enhancement Circuit. - Hossein Noori; Fa Foster Dai (ISCAS, 2012)

Impact of process variations on computers used for image processing. - Suraj Sindia; Fa Foster Dai; Vishwani D. Agrawal; Virendra Singh (ISCAS, 2012)

Introduction to the Special Section on the 25th Bipolar/BiCMOS Circuits and Technology Meeting. - Fa Foster Dai (IEEE J. Solid State Circuits, 2012)

A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise Reduction. - Feng Zhao; Fa Foster Dai (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Impact of Transceiver RFIC Impairments on MIMO System Performance. - Yuehai Jin; Fa Foster Dai (IEEE Trans. Ind. Electron., 2012)

Introduction to the Special Section on the 26th Bipolar/BiCMOS Circuits and Technology Meeting. - Fa Foster Dai (IEEE J. Solid State Circuits, 2013)

Low power transceivers and oscillators. - Foster F. Dai; Byunghoo Jung (CICC, 2014)

A capacitive-coupling technique with phase noise and phase error reduction for multi-phase clock generation. - Feng Zhao; Fa Foster Dai (CICC, 2014)

An X-Band Radar Transceiver MMIC with Bandwidth Reduction in 0.13 µm SiGe Technology. - Jianjun Yu; Feng Zhao; Joseph Cali; Fa Foster Dai; Desheng Ma; Xueyang Geng; Yuehai Jin; Yuan Yao; Xin Jin; J. David Irwin; Richard C. Jaeger (IEEE J. Solid State Circuits, 2014)

Low noise coupling techniques for multi-phase oscillators. - Fa Foster Dai; Feng Zhao; Rong Jiang (ASICON, 2015)

Session 4 - Frequency and phase generation techniques. - Fa Foster Dai; Swaminathan Sankaran (CICC, 2015)

Adaptive integratable hardware realization of analog neural networks for nonlinear system. - Zhan Su; Bogdan M. Wilamowski; Ruixin Wang; Fa Foster Dai (INDIN, 2015)

A 1∼1.5 GHz capacitive coupled inductor-less multi-ring oscillator with improved phase noise. - Ruixin Wang; Fa Foster Dai (ESSCIRC, 2016)

A bidirectional lens-free digital-bits-in/-out 0.57mm2 Terahertz nano-radio in CMOS with 49.3mW peak power consumption supporting 50cm Internet-of-Things communication. - Taiyun Chi; Hechen Wang; Min-Yu Huang; Fa Foster Dai; Hua Wang 006 (CICC, 2017)

Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking. - Dongyi Liao; Fa Foster Dai; Bram Nauta; Eric A. M. Klumperink (CICC, 2017)

Session 24-Milimeter-wave communication circuits. - John Long; Fa Foster Dai (CICC, 2017)

A 0.8∼1.3 GHz multi-phase injection-locked PLL using capacitive coupled multi-ring oscillator with reference spur suppression. - Ruixin Wang; Fa Foster Dai (CICC, 2017)

A 330μW 1.25ps 400fs-INL vernier time-to-digital converter with 2D reconfigurable spiral arbiter array and 2nd-order ΔΣ linearization. - Hechen Wang; Fa Foster Dai; Hua Wang 006 (CICC, 2017)

A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology. - Hechen Wang; Fa Foster Dai (ESSCIRC, 2017)

A low phase noise 8.8 GHz VCO based on ISF manipulation and dual-tank technique. - Rong Jiang; Hossein Noori; Fa Foster Dai; Jun Fu 010; Wei Zhou; Yudong Wang 001 (ISCAS, 2017)

Offset based feedforward amplifier with nonlinearity compensation and P1dB expansion. - Zhan Su; Hossein Noori; Fa Foster Dai; Wei Zhou; Yudong Wang 001; Jun Fu 010 (ISCAS, 2017)

An 802.11a/b/g/n Digital Fractional-N PLL With Automatic TDC Linearity Calibration for Spur Cancellation. - Dongyi Liao; Hechen Wang; Fa Foster Dai; Yang Xu 017; Roc Berenguer; Sara Munoz Hermoso (IEEE J. Solid State Circuits, 2017)

A full-duplex transceiver front-end RFIC with code-domain spread spectrum modulation for Tx self-interference cancellation and in-band jammer rejection. - Zhenqi Chen; Dongyi Liao; Fa Foster Dai (CICC, 2018)

A 1.8 GHz-2.4 GHz SAW-Less Reconfigurable Receiver Frontend RFIC in 65nm CMOS RF SOI. - Hossein Noori; Rong Jiang; Fa Foster Dai (ISCAS, 2018)

A Low Phase Noise Ring Oscillator with Miller Capacitance Cancellation. - Yucheng Tong; Fa Foster Dai; Hossein Noori; Kun Zhao (ISCAS, 2018)

A Multi-Phase Coupled Oscillator Using Inductive Resonant Coupling and Modified Dual-Tank Techniques. - Rong Jiang; Hossein Noori; Fa Foster Dai (IEEE J. Solid State Circuits, 2018)

A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching. - Dongyi Liao; Fa Foster Dai; Bram Nauta; Eric A. M. Klumperink (IEEE J. Solid State Circuits, 2018)

A Reconfigurable Vernier Time-to-Digital Converter With 2-D Spiral Comparator Array and Second-Order ΔΣ Linearization. - Hechen Wang; Fa Foster Dai; Hua Wang 006 (IEEE J. Solid State Circuits, 2018)

An mm-Wave Synthesizer with Low In-Band Noise and Robust Locking Reference-Sampling PLL. - Dongyi Liao; Yucai Zhang; Zhenqi Chen; Yanjie Wang; Fa Foster Dai (CICC, 2019)

A 280MS/s 12b SAR-Assisted Hybrid ADC with Time Domain Sub-Range Quantizer in 45nm CMOS. - Zhan Su; Hechen Wang; Haoyi Zhao; Zhenqi Chen; Yanjie Wang; Fa Foster Dai (CICC, 2019)

An 8-bit 80-MS/s Fully Self-Timed SAR ADC with 3/2 Interleaved Comparators and High-Order PVT Stabilized HBT Bandgap Reference. - Zhan Su; Hechen Wang; Haoyi Zhao; Xiao Liu; Fa Foster Dai (ISCAS, 2019)

A 3.8 mW Sub-Sampling Direct RF-to-Digital Converter for Polar Receiver Achieving 1.94 Gb/s Data Rate with 1024-APSK Modulation. - Hechen Wang; Zhan Su; Haoyi Zhao; Yanjie Wang; Fa Foster Dai (VLSI Circuits, 2019)

A 7.7 10.3GHz 5.2mW -247.3dB-FOM Fractional-N Reference Sampling PLL with 2nd Order CDAC Based Fractional Spur Cancellation In 45nm CMOS. - Dongyi Liao; Fa Foster Dai (CICC, 2020)

An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range Injection-Locked VCO. - Dongyi Liao; Yucai Zhang; Fa Foster Dai; Zhenqi Chen; Yanjie Wang (IEEE J. Solid State Circuits, 2020)

Sub-Sampling Direct RF-to-Digital Converter With 1024-APSK Modulation for High Throughput Polar Receiver. - Hechen Wang; Fa Foster Dai; Zhan Su; Yanjie Wang (IEEE J. Solid State Circuits, 2020)

A Fractional-N Reference Sampling PLL With Linear Sampler and CDAC Based Fractional Spur Cancellation. - Dongyi Liao; Fa Foster Dai (IEEE J. Solid State Circuits, 2021)

A 0.97mW 260MS/s 12b Pipelined-SAR ADC with Ring-TDC-Based Fine Quantizer for PVT Robust Automatic Cross-Domain Scale Alignment. - Haoyi Zhao; Fa Foster Dai (ISSCC, 2022)

A 12-Bit 260-MS/s Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automatic Cross-Domain Scale Alignment. - Haoyi Zhao; Fa Foster Dai (IEEE J. Solid State Circuits, 2023)

A 10-bit 100kS/s SAR ADC With a Monotonic Capacitor Switching Procedure for Single-Ended Inputs in 22nm CMOS FDSOI. - Alexander Meyer; Kaoru Yamashita; Adilet Dossanov; Martin Maier; Finn Stapelfeldt; Yerzhan Kudabay; Peter Toth; Fa Foster Dai; Hiroki Ishikuro; Vadim Issakov (ISCAS, 2024)