Design Space Exploration of Next-Generation HPC Machines. - Constantino Gómez; Francesc Martínez; Adrià Armejach; Miquel Moretó; Filippo Mantovani; Marc Casas (IPDPS, 2019)

Multilevel simulation-based co-design of next generation HPC microprocessors. - Lilia Zaourar; Mohamed Benazouz; Ayoub Mouhagir; Fatma Jebali; Tanguy Sassolas; Jean-Christophe Weill; Carlos Falquez; Nam Ho; Dirk Pleiter; Antoni Portero; Estela Suarez; Polydoros Petrakis; et al. (PMBS, 2021)

Exploiting Vector Code Semantics for Efficient Data Cache Prefetching. - Francesc Martínez Palau; Martí Torrents; Adrià Armejach; Marc Casas (ICS, 2024)

A Flexible Instruction Set Architecture for Efficient GEMMs. - Alexandre de Limas Santana; Adrià Armejach; Francesc Martínez; Erich Focht; Marc Casas (CoRR, 2025)