Francesc Moll
Orcid: 0000-0002-1290-3253
According to our database1,
Francesc Moll
authored at least 62 papers
between 2002 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on zbmath.org
-
on orcid.org
-
on id.loc.gov
On csauthors.net:
Bibliography
2024
Energy and relevance-aware adaptive monitoring method for wireless sensor nodes with hard energy constraints.
Integr., January, 2024
2023
IEEE Trans. Very Large Scale Integr. Syst., November, 2023
Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications.
ACM Trans. Archit. Code Optim., June, 2023
J. Syst. Archit., 2023
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
Proceedings of the Cooperative Information Systems - 29th International Conference, 2023
2022
Current Balancing Random Body Bias in FDSOI Cryptosystems as a Countermeasure to Leakage Power Analysis Attacks.
IEEE Access, 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
Two examples of approximate arithmetic to reduce hardware complexity and power consumption.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
Analysis of Random Body Bias Application in FDSOI Cryptosystems as a Countermeasure to Leakage-Based Power Analysis Attacks.
IEEE Access, 2021
VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
Data Relevance-Aware Dynamic Sensing Technique with Battery Lifetime Guarantee for Wireless Sensor Nodes.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021
2020
Mechanical Energy Harvesting Taxonomy for Industrial Environments: Application to the Railway Industry.
IEEE Trans. Intell. Transp. Syst., 2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
Analysis of Body Bias and RTN-Induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Insights Into Tunnel FET-Based Charge Pumps and Rectifiers for Energy Harvesting Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2017
Statistical characterization and modeling of random telegraph noise effects in 65nm SRAMs cells.
Proceedings of the 14th International Conference on Synthesis, 2017
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
2016
Experience on material implication computing with an electromechanical memristor emulator.
Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016
A battery-less, self-sustaining RF energy harvesting circuit with TFETs for µW power applications.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
ASIC Implementation of An All-digital Self-adaptive PVTA Variation-aware Clock Generation System.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
2015
Local variations compensation with DLL-based Body Bias Generator for UTBB FD-SOI technology.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
Novel charge pump converter with Tunnel FET devices for ultra-low power energy harvesting sources.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Pespectives of TFET devices in ultra-low power charge pumps for thermo-electric energy sources.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
All-Digital Simple Clock Synthesis Through a Glitch-Free Variable-Length Ring Oscillator.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Microelectron. Reliab., 2014
2013
Systematic and random variability analysis of two different 6T-SRAM layout topologies.
Microelectron. J., 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
Logic synthesis for manufacturability considering regularity and lithography printability.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
Design and implementation of an adaptive proactive reconfiguration technique for SRAM caches.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Variation tolerant self-adaptive clock generation architecture based on a ring oscillator.
Proceedings of the IEEE 25th International SOC Conference, 2012
Proceedings of the IEEE 25th International SOC Conference, 2012
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
2011
Microelectron. J., 2011
Design of complex circuits using the Via-Configurable transistor array regular layout fabric.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Monitor strategies for variability reduction considering correlation between power and timing variability.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
Proceedings of the CONIELECOMP 2011, 21st International Conference on Electrical, Communications, and Computers, 28 February, 2011
Proceedings of the ARCS 2011, 2011
SYNAPTIC Project: Regularity Applied to Enhance Manufacturability and Yield at Several Abstraction Levels.
Proceedings of the ARCS 2011, 2011
2010
J. Low Power Electron., 2010
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
2009
A new compensation mechanism for environmental parameter fluctuations in CMOS digital ICs.
Microelectron. J., 2009
2008
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2003
Microelectron. J., 2003
Analysis of the Contribution of Interconnect Effects in the Energy Dissipation of VLSI Circuits.
Proceedings of the Integrated Circuit and System Design, 2003
2002
IEEE Des. Test Comput., 2002