Heterogeneous Clustered Processors: Organisation and Design. - Francesco Pessolano (Euro-Par, 1999)

An Objective Measure of Digital System Design Quality. - Dave Protheroe; Francesco Pessolano (ISQED, 2000)

Asynchronous First-in First-out Queues. - Francesco Pessolano; Joep L. W. Kessels (PATMOS, 2000)

MDSP: A High-Performance Low-Power DSP Architecture. - Francesco Pessolano; Joep L. W. Kessels; Ad M. G. Peeters (PATMOS, 2002)

Analysis of High-Speed Logic Families. - G. Privitera; Francesco Pessolano (PATMOS, 2003)

On ambient intelligence, needful things and process technologies. - Carel J. van der Poel; Francesco Pessolano; Raf Roovers; Frans Widdershoven; G. de Walle; Emile H. L. Aarts; Phillip Christie (ESSCIRC, 2004)

Technology exploration for adaptive power and frequency scaling in 90nm CMOS. - Maurice Meijer; Francesco Pessolano; José Pineda de Gyvez (ISLPED, 2004)

A 260ps Quasi-static ALU in 90nm CMOS. - Francesco Pessolano; R. I. M. P. Meijer (PATMOS, 2004)

How to determine the necessity for emerging solutions. - Nic Mokhoff; Yervant Zorian; Kamalesh N. Ruparel; Hao Nham; Francesco Pessolano; Kee Sup Kim (DAC, 2005)

Limits to performance spread tuning using adaptive voltage and body biasing. - Maurice Meijer; Francesco Pessolano; José Pineda de Gyvez (ISCAS (1), 2005)

Glitch-free discretely programmable clock generation on chip. - Maurice Meijer; Francesco Pessolano; José Pineda de Gyvez (ISCAS (2), 2005)

The Holy Grail of Holistic Low-Power Design. - Francesco Pessolano (PATMOS, 2006)