A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. - Francesco Radice; Melchiorre Bruccoleri; Marcello Ganzerli; Giorgio Spelgatti; Davide Sanzogni; Massimo Pozzoni; Andrea Mazzanti (ESSCIRC, 2013)

8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS. - Enrico Mammei; Fabrizio Loi; Francesco Radice; Angelo Dati; Melchiorre Bruccoleri; Matteo Bassi; Andrea Mazzanti (ISSCC, 2014)

Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS. - Enrico Mammei; Fabrizio Loi; Francesco Radice; Angelo Dati; Melchiorre Bruccoleri; Matteo Bassi; Andrea Mazzanti (IEEE J. Solid State Circuits, 2014)

A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOI. - Francesco Radice; Melchiorre Bruccoleri; Enrico Mammei; Matteo Bassi; Andrea Mazzanti (ESSCIRC, 2015)

3.6 A 45Gb/s PAM-4 transmitter delivering 1.3Vppd output swing with 1V supply in 28nm CMOS FDSOI. - Matteo Bassi; Francesco Radice; Melchiorre Bruccoleri; Simone Erba; Andrea Mazzanti (ISSCC, 2016)

A High-Swing 45 Gb/s Hybrid Voltage and Current-Mode PAM-4 Transmitter in 28 nm CMOS FDSOI. - Matteo Bassi; Francesco Radice; Melchiorre Bruccoleri; Simone Erba; Andrea Mazzanti (IEEE J. Solid State Circuits, 2016)

12.2 A 4-Channel 200Gb/s PAM-4 BiCMOS Transceiver with Silicon Photonics Front-Ends for Gigabit Ethernet Applications. - Enrico Sentieri; Tino Copani; Andrea Paganini; Matteo Traldi; Angelo Palladino; Antonio Santipo; Lorenzo Gerosa; Matteo Repossi; Gianluca Catrini; Marta Campo; Francesco Radice; Andrea Diodato; et al. (ISSCC, 2020)