Automatic synthesis of the Hardware/Software Interface. - Francesco Regazzoni 001; André C. Nácul; Marcello Lajolo (FDL, 2005)

Speeding Up AES By Extending a 32 bit Processor Instruction Set. - Guido Bertoni; Luca Breveglieri; Roberto Farina; Francesco Regazzoni 001 (ASAP, 2006)

Hardware/software partitioning of operating systems: a behavioral synthesis approach. - Sathish Chandra; Francesco Regazzoni 001; Marcello Lajolo (ACM Great Lakes Symposium on VLSI, 2006)

Hardware scheduling support in SMP architectures. - André C. Nácul; Francesco Regazzoni 001; Marcello Lajolo (DATE, 2007)

Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits. - Francesco Regazzoni 001; Thomas Eisenbarth 001; Johann Großschädl; Luca Breveglieri; Paolo Ienne; Israel Koren; Christof Paar (DFT, 2007)

A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. - Francesco Regazzoni 001; Stéphane Badel; Thomas Eisenbarth 001; Johann Großschädl; Axel Poschmann; Zeynep Toprak Deniz; Marco Macchetti; Laura Pozzi 001; Christof Paar; Yusuf Leblebici; Paolo Ienne (ICSAMOS, 2007)

Area and Power Efficient Synthesis of DPA-Resistant Cryptographic S-Boxes. - Matteo Giaconia; Marco Macchetti; Francesco Regazzoni 001; Kai Schramm (VLSI Design, 2007)

Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?. - Francesco Regazzoni 001; Thomas Eisenbarth 001; Luca Breveglieri; Paolo Ienne; Israel Koren (DFT, 2008)

A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm. - Guido Marco Bertoni; Luca Breveglieri; Roberto Farina; Francesco Regazzoni 001 (SECRYPT, 2008)

A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions. - Francesco Regazzoni 001; Alessandro Cevrero; François-Xavier Standaert; Stéphane Badel; Theo Kluter; Philip Brisk; Yusuf Leblebici; Paolo Ienne (CHES, 2009)

The Certicom Challenges ECC2-X. - Daniel V. Bailey; Brian Baldwin; Lejla Batina; Daniel J. Bernstein; Peter Birkner; Joppe W. Bos; Gauthier Van Damme; Giacomo de Meulenaer; Junfeng Fan; Tim Güneysu; Frank K. Gürkaynak; Thorsten Kleinjung; et al. (IACR Cryptol. ePrint Arch., 2009)

Breaking ECC2K-130. - Daniel V. Bailey; Lejla Batina; Daniel J. Bernstein; Peter Birkner; Joppe W. Bos; Hsieh-Chung Chen; Chen-Mou Cheng; Gauthier Van Damme; Giacomo de Meulenaer; Luis J. Dominguez Perez; Junfeng Fan; Tim Güneysu; et al. (IACR Cryptol. ePrint Arch., 2009)

Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology. - Francesco Regazzoni 001; Thomas Eisenbarth 001; Axel Poschmann; Johann Großschädl; Frank K. Gürkaynak; Marco Macchetti; Zeynep Toprak Deniz; Laura Pozzi 001; Christof Paar; Yusuf Leblebici; Paolo Ienne (Trans. Comput. Sci., 2009)

Fresh Re-keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices. - Marcel Medwed; François-Xavier Standaert; Johann Großschädl; Francesco Regazzoni 001 (AFRICACRYPT, 2010)

Countermeasures against fault attacks on software implemented AES: effectiveness and cost. - Alessandro Barenghi; Luca Breveglieri; Israel Koren; Gerardo Pelosi; Francesco Regazzoni 001 (WESS, 2010)

A reconfigurable multiprocessor architecture for a reliable face recognition implementation. - Antonino Tumeo; Francesco Regazzoni 001; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (DATE, 2010)

Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software. - Jean-François Gallais; Johann Großschädl; Neil Hanley; Markus Kasper; Marcel Medwed; Francesco Regazzoni 001; Jörn-Marc Schmidt; Stefan Tillich; Marcin Wójcik (INTRUST, 2010)

Compact FPGA Implementations of the Five SHA-3 Finalists. - Stéphanie Kerckhof; François Durvaux; Nicolas Veyrat-Charvillon; Francesco Regazzoni 001; Guerric Meurice de Dormale; François-Xavier Standaert (CARDIS, 2011)

Fresh Re-keying II: Securing Multiple Parties against Side-Channel and Fault Attacks. - Marcel Medwed; Christophe Petit 001; Francesco Regazzoni 001; Mathieu Renauld; François-Xavier Standaert (CARDIS, 2011)

A first step towards automatic application of power analysis countermeasures. - Ali Galip Bayrak; Francesco Regazzoni 001; Philip Brisk; François-Xavier Standaert; Paolo Ienne (DAC, 2011)

Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library. - Alessandro Cevrero; Francesco Regazzoni 001; Micheal Schwander; Stéphane Badel; Paolo Ienne; Yusuf Leblebici (DAC, 2011)

Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-threshold Devices through an Example of a 65nm AES Implementation. - Alessandro Barenghi; Cédric Hocquet; David Bol; François-Xavier Standaert; Francesco Regazzoni 001; Israel Koren (RFIDSec, 2011)

Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags. - Cédric Hocquet; Dina Kamel; Francesco Regazzoni 001; Jean-Didier Legat; Denis Flandre; David Bol; François-Xavier Standaert (J. Cryptogr. Eng., 2011)

Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices. - Thomas Eisenbarth 001; Zheng Gong; Tim Güneysu; Stefan Heyse; Sebastiaan Indesteege; Stéphanie Kerckhof; François Koeune; Tomislav Nad; Thomas Plos; Francesco Regazzoni 001; François-Xavier Standaert; Loïc van Oldeneel tot Oldenzeel (AFRICACRYPT, 2012)

Security Enhanced Linux on embedded systems: A hardware-accelerated implementation. - Leandro Fiorin; Alberto Ferrante; Konstantinos Padarnitsas; Francesco Regazzoni 001 (ASP-DAC, 2012)

LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network. - Bishal Lamichhane; Steven Mudda; Francesco Regazzoni 001; Alessandro Puiatti (BHI, 2012)

Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices. - Josep Balasch; Baris Ege; Thomas Eisenbarth 001; Benoît Gérard; Zheng Gong; Tim Güneysu; Stefan Heyse; Stéphanie Kerckhof; François Koeune; Thomas Plos; Thomas Pöppelmann; Francesco Regazzoni 001; et al. (IACR Cryptol. ePrint Arch., 2012)

A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy Under Timing Constraints. - David Bol; Cédric Hocquet; Francesco Regazzoni 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks. - Francesco Regazzoni 001; Luca Breveglieri; Paolo Ienne; Israel Koren (Fault Analysis in Cryptography, 2012)

Sleuth: Automated Verification of Software Power Analysis Countermeasures. - Ali Galip Bayrak; Francesco Regazzoni 001; David Novo; Paolo Ienne (CHES, 2013)

Stealthy Dopant-Level Hardware Trojans. - Georg T. Becker; Francesco Regazzoni 001; Christof Paar; Wayne P. Burleson (CHES, 2013)

Single-photon image sensors. - Edoardo Charbon; Francesco Regazzoni 001 (DAC, 2013)

An EDA-friendly protection scheme against side-channel attacks. - Ali Galip Bayrak; Nikola Velickovic; Francesco Regazzoni 001; David Novo; Philip Brisk; Paolo Ienne (DATE, 2013)

ALE: AES-Based Lightweight Authenticated Encryption. - Andrey Bogdanov; Florian Mendel; Francesco Regazzoni 001; Vincent Rijmen; Elmar Tischhauser (FSE, 2013)

A Survey of Recent Results in FPGA Security and Intellectual Property Protection. - François Durvaux; Stéphanie Kerckhof; Francesco Regazzoni 001; François-Xavier Standaert (Secure Smart Embedded Devices, Platforms and Applications, 2014)

SPADs for quantum random number generators and beyond. - Samuel Burri; Damien Stucki; Yuki Maruyama; Claudio Bruschini; Edoardo Charbon; Francesco Regazzoni 001 (ASP-DAC, 2014)

Accelerating differential power analysis on heterogeneous systems. - João Amaral; Francesco Regazzoni 001; Pedro Tomás; Ricardo Chaves (WESS, 2014)

THOR - The hardware onion router. - Tim Güneysu; Francesco Regazzoni 001; Pascal Sasdrich; Marcin Wójcik (FPL, 2014)

Lightweight cryptography for constrained devices. - Cesare Alippi; Andrey Bogdanov; Francesco Regazzoni 001 (ISIC, 2014)

Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks. - Alessandro Barenghi; Gerardo Pelosi; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2014)

Stealthy dopant-level hardware Trojans: extended version. - Georg T. Becker; Francesco Regazzoni 001; Christof Paar; Wayne P. Burleson (J. Cryptogr. Eng., 2014)

A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks. - Alessandro Barenghi; Cédric Hocquet; David Bol; François-Xavier Standaert; Francesco Regazzoni 001; Israel Koren (IEEE Trans. Emerg. Top. Comput., 2014)

Midori: A Block Cipher for Low Energy. - Subhadeep Banik; Andrey Bogdanov; Takanori Isobe 001; Kyoji Shibutani; Harunaga Hiwatari; Toru Akishita; Francesco Regazzoni 001 (ASIACRYPT (2), 2015)

Design methodologies for securing cyber-physical systems. - Mohammad Abdullah Al Faruque; Francesco Regazzoni 001; Miroslav Pajic (CODES+ISSS, 2015)

Fault attacks, injection techniques and tools for simulation. - Roberta Piscitelli; Shivam Bhasin; Francesco Regazzoni 001 (DTIS, 2015)

Physical attacks, introduction and application to embedded processors. - Francesco Regazzoni 001 (DTIS, 2015)

200 MS/s ADC implemented in a FPGA employing TDCs. - Harald Homulle; Francesco Regazzoni 001; Edoardo Charbon (FPGA, 2015)

Simulation and analysis of negative-bias temperature instability aging on power analysis attacks. - Xiaofei Guo; Naghmeh Karimi; Francesco Regazzoni 001; Chenglu Jin; Ramesh Karri (HOST, 2015)

A survey on hardware trojan detection techniques. - Shivam Bhasin; Francesco Regazzoni 001 (ISCAS, 2015)

Challenges in designing trustworthy cryptographic co-processors. - Ricardo Chaves; Giorgio Di Natale; Lejla Batina; Shivam Bhasin; Baris Ege; Apostolos P. Fournaris; Nele Mentens; Stjepan Picek; Francesco Regazzoni 001; Vladimir Rozic; Nicolas Sklavos 001; Bohan Yang 001 (ISCAS, 2015)

Exploring the energy consumption of lightweight blockciphers in FPGA. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001 (ReConFig, 2015)

Midori: A Block Cipher for Low Energy (Extended Version). - Subhadeep Banik; Andrey Bogdanov; Takanori Isobe 001; Kyoji Shibutani; Harunaga Hiwatari; Toru Akishita; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2015)

Exploring Energy Efficiency of Lightweight Block Ciphers. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2015)

Automatic Application of Power Analysis Countermeasures. - Ali Galip Bayrak; Francesco Regazzoni 001; David Novo; Philip Brisk; François-Xavier Standaert; Paolo Ienne (IEEE Trans. Computers, 2015)

Adaptable AES implementation with power-gating support. - Subhadeep Banik; Andrey Bogdanov; Tiziana Fanni; Carlo Sau; Luigi Raffo; Francesca Palumbo; Francesco Regazzoni 001 (Conf. Computing Frontiers, 2016)

Secure architectures of future emerging cryptography SAFEcrypto. - Máire O'Neill; Elizabeth O'Sullivan; Gavin McWilliams; Markku-Juhani O. Saarinen; Ciara Moore; Ayesha Khalid; James Howe; Rafaël Del Pino; Michel Abdalla; Francesco Regazzoni 001; Felipe Valencia; Tim Güneysu; et al. (Conf. Computing Frontiers, 2016)

Standard lattices in hardware. - James Howe; Ciara Moore; Máire O'Neill; Francesco Regazzoni 001; Tim Güneysu; K. Beeden (DAC, 2016)

Instruction Set Extensions for secure applications. - Francesco Regazzoni 001; Paolo Ienne (DATE, 2016)

Evaluating the Impact of Environmental Factors on Physically Unclonable Functions (Abstract Only). - Sebastien Bellon; Claudio Favi; Miroslaw Malek; Marco Macchetti; Francesco Regazzoni 001 (FPGA, 2016)

Round gating for low energy block ciphers. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001; Takanori Isobe 001; Harunaga Hiwatari; Toru Akishita (HOST, 2016)

Lattice-based cryptography: From reconfigurable hardware to ASIC. - Tobias Oder; Tim Güneysu; Felipe Valencia; Ayesha Khalid; Máire O'Neill; Francesco Regazzoni 001 (ISIC, 2016)

Physical Attacks and Beyond. - Francesco Regazzoni 001 (SAC, 2016)

Evaluating physically unclonable functions on a large set of FPGAs. - Sebastien Bellon; Claudio Favi; Miroslaw Malek; Marco Macchetti; Francesco Regazzoni 001 (SAMOS, 2016)

Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2016)

Atomic-AES v 2.0. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2016)

Embedded systems education: job market expectations. - Mariagiovanna Sami; Miroslaw Malek; Umberto Bondi; Francesco Regazzoni 001 (SIGBED Rev., 2016)

Securing the hardware of cyber-physical systems. - Francesco Regazzoni 001; Ilia Polian (ASP-DAC, 2017)

Efficient arithmetic for lattice-based cryptography: special session paper. - Elizabeth O'Sullivan; Francesco Regazzoni 001 (CODES+ISSS, 2017)

Cross-layer design of reconfigurable cyber-physical systems. - Michael Masin; Francesca Palumbo; Hans Myrhaug; J. A. de Oliveira Filho; M. Pastena; Maxime Pelcat; Luigi Raffo; Francesco Regazzoni 001; A. A. Sanchez; Antonella Toffetti; Eduardo de la Torre; Katiuscia Zedda (DATE, 2017)

Counteracting malicious faults in cryptographic circuits. - Ilia Polian; Francesco Regazzoni 001 (ETS, 2017)

Efficient configurations for block ciphers with unified ENC/DEC paths. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001 (HOST, 2017)

Special session on architectures and design tools for secure embedded systems. - Francesco Regazzoni 001 (SAMOS, 2017)

The design space of the number theoretic transform: A survey. - Felipe Valencia; Ayesha Khalid; Elizabeth O'Sullivan; Francesco Regazzoni 001 (SAMOS, 2017)

Introduction to hardware-oriented security for MPSoCs. - Ilia Polian; Francesco Regazzoni 001; Johanna Sepúlveda (SoCC, 2017)

An Investigation of Sources of Randomness Within Discrete Gaussian Sampling. - Séamus Brannigan; Neil Smyth; Tobias Oder; Felipe Valencia; Elizabeth O'Sullivan; Tim Güneysu; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2017)

SCA-Resistance for AES: How Cheap Can We Go? - Ricardo Chaves; Lukasz Chmielewski; Francesco Regazzoni 001; Lejla Batina (AFRICACRYPT, 2018)

ASHES 2018- Workshop on Attacks and Solutions in Hardware Security. - Chip-Hong Chang; Jorge Guajardo; Daniel E. Holcomb; Francesco Regazzoni 001; Ulrich Rührmair (CCS, 2018)

TAO: techniques for algorithm-level obfuscation during high-level synthesis. - Christian Pilato; Francesco Regazzoni 001; Ramesh Karri; Siddharth Garg (DAC, 2018)

Physical Protection of Lattice-Based Cryptography: Challenges and Solutions. - Ayesha Khalid; Tobias Oder; Felipe Valencia; Máire O'Neill; Tim Güneysu; Francesco Regazzoni 001 (ACM Great Lakes Symposium on VLSI, 2018)

Exploring the Vulnerability of R-LWE Encryption to Fault Attacks. - Felipe Valencia; Tobias Oder; Tim Güneysu; Francesco Regazzoni 001 (CS2@HiPEAC, 2018)

Inverse gating for low energy encryption. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001; Takanori Isobe 001; Harunaga Hiwatari; Toru Akishita (HOST, 2018)

Security: the dark side of approximate computing? - Francesco Regazzoni 001; Cesare Alippi; Ilia Polian (ICCAD, 2018)

Session details: Security threats caused by novel technologies. - Zakaria Najm; Martha Johanna Sepúlveda Flórez; Francesco Regazzoni 001 (SAMOS, 2018)

Quantum era challenges for classical computers. - Francesco Regazzoni 001; Austin G. Fowler; Ilia Polian (SAMOS, 2018)

Securing Hardware Accelerators: A New Challenge for High-Level Synthesis. - Christian Pilato; Siddharth Garg; Kaijie Wu 001; Ramesh Karri; Francesco Regazzoni 001 (IEEE Embed. Syst. Lett., 2018)

Customized Instructions for Protection Against Memory Integrity Attacks. - Debapriya Basu Roy; Manaar Alam; Sarani Bhattacharya; Vidya Govindan; Francesco Regazzoni 001; Rajat Subhra Chakraborty; Debdeep Mukhopadhyay (IEEE Embed. Syst. Lett., 2018)

Lightweight Circuits with Shift and Swap. - Subhadeep Banik; Francesco Regazzoni 001; Serge Vaudenay (IACR Cryptol. ePrint Arch., 2018)

Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography. - Ayesha Khalid; James Howe; Ciara Rafferty; Francesco Regazzoni 001; Máire O'Neill (IACR Cryptol. ePrint Arch., 2018)

Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow. - Nele Mentens; Edoardo Charbon; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2018)

When Theory Meets Practice: A Framework for Robust Profiled Side-channel Analysis. - Stjepan Picek; Annelie Heuser; Cesare Alippi; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2018)

On Practical Discrete Gaussian Samplers for Lattice-Based Cryptography. - James Howe; Ayesha Khalid; Ciara Rafferty; Francesco Regazzoni 001; Máire O'Neill (IEEE Trans. Computers, 2018)

Towards Low Energy Stream Ciphers. - Subhadeep Banik; Vasily Mikhalev; Frederik Armknecht; Takanori Isobe 001; Willi Meier; Andrey Bogdanov; Yuhei Watanabe; Francesco Regazzoni 001 (IACR Trans. Symmetric Cryptol., 2018)

ASHES 2019: 3rd Workshop on Attacks and Solutions in Hardware Security. - Chip-Hong Chang; Daniel E. Holcomb; Francesco Regazzoni 001; Ulrich Rührmair; Patrick Schaumont (CCS, 2019)

CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF. - Francesca Palumbo; Tiziana Fanni; Carlo Sau; Luca Pulina; Luigi Raffo; Michael Masin; Evgeny Shindin; Pablo Sanchez de Rojas; Karol Desnos; Maxime Pelcat; Alfonso Rodríguez 002; Eduardo Juárez 001; et al. (CF, 2019)

High-Level Synthesis of Benevolent Trojans. - Christian Pilato; Kanad Basu; Mohammed Shayan; Francesco Regazzoni 001; Ramesh Karri (DATE, 2019)

Security in Autonomous Systems. - Stefan Katzenbeisser 001; Ilia Polian; Francesco Regazzoni 001; Marc Stöttinger (ETS, 2019)

PlaidML-HE: Acceleration of Deep Learning Kernels to Compute on Encrypted Data. - Huili Chen; Rosario Cammarota; Felipe Valencia; Francesco Regazzoni 001 (ICCD, 2019)

Elicitation of technical requirements in large research projects: the CERBERO approach. - Michael Masin; Francesca Palumbo; Joost Adriaanse; Hans Myrhaug; Francesco Regazzoni 001; Manuel Sanchez; Katiuscia Zedda (SAC, 2019)

Fault Sensitivity Analysis of Lattice-Based Post-Quantum Cryptographic Components. - Felipe Valencia; Ilia Polian; Francesco Regazzoni 001 (SAMOS, 2019)

Post-Quantum Lattice-Based Cryptography Implementations: A Survey. - Hamid Nejatollahi; Nikil D. Dutt; Sandip Ray; Francesco Regazzoni 001; Indranil Banerjee; Rosario Cammarota (ACM Comput. Surv., 2019)

Secure Composition for Hardware Systems (Dagstuhl Seminar 19301). - Divya Arora 001; Ilia Polian; Francesco Regazzoni 001; Patrick Schaumont (Dagstuhl Reports, 2019)

Guest Editors' Introduction. - Francesco Regazzoni 001; Arquimedes Canedo; Mohammad Abdullah Al Faruque (IEEE Embed. Syst. Lett., 2019)

Fault Attack Countermeasures for Error Samplers in Lattice-Based Cryptography. - James Howe; Ayesha Khalid; Marco Martinoli; Francesco Regazzoni 001; Elisabeth Oswald (IACR Cryptol. ePrint Arch., 2019)

Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers. - Madura A. Shelton; Niels Samwel; Lejla Batina; Francesco Regazzoni 001; Markus Wagner 007; Yuval Yarom (IACR Cryptol. ePrint Arch., 2019)

Compact circuits for combined AES encryption/decryption. - Subhadeep Banik; Andrey Bogdanov; Francesco Regazzoni 001 (J. Cryptogr. Eng., 2019)

TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking. - Christian Pilato; Kaijie Wu 001; Siddharth Garg; Ramesh Karri; Francesco Regazzoni 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations. - Stjepan Picek; Annelie Heuser; Alan Jovic; Shivam Bhasin; Francesco Regazzoni 001 (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019)

Black-Hat High-Level Synthesis: Myth or Reality? - Christian Pilato; Kanad Basu; Francesco Regazzoni 001; Ramesh Karri (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A secure, distributed and scalable infrastructure for remote generation and use of cryptographic keys. - Claudio Bareato; Paolo Palmieri 001; Francesco Regazzoni 001; Oreste Venier (BRAINS, 2020)

AHEC: End-to-end Compiler Framework for Privacy-preserving Machine Learning Acceleration. - Huili Chen; Rosario Cammarota; Felipe Valencia; Francesco Regazzoni 001; Farinaz Koushanfar (DAC, 2020)

Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks? - Ognjen Glamocanin; Louis Coulon; Francesco Regazzoni 001; Mirjana Stojilovic (DATE, 2020)

Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. - Johann Knechtel; Elif Bilge Kavun; Francesco Regazzoni 001; Annelie Heuser; Anupam Chattopadhyay; Debdeep Mukhopadhyay; Soumyajit Dey; Yunsi Fei; Yaacov Belenky; Itamar Levi; Tim Güneysu; Patrick Schaumont; et al. (DATE, 2020)

Latest Trends in Hardware Security and Privacy. - Giorgio Di Natale; Francesco Regazzoni 001; Vincent Albanese; Frank Lhermet; Yann Loisel; Abderrahmane Sensaoui; Samuel Pagliarini (DFT, 2020)

Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs. - Ognjen Glamocanin; Louis Coulon; Francesco Regazzoni 001; Mirjana Stojilovic (FPGA, 2020)

Side Channel Attacks vs Approximate Computing. - Francesco Regazzoni 001; Ilia Polian (ACM Great Lakes Symposium on VLSI, 2020)

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. - Francesco Regazzoni 001; Shivam Bhasin; Amir Alipour; Ihab Alshaer; Furkan Aydin; Aydin Aysu; Vincent Beroulle; Giorgio Di Natale; Paul D. Franzon; David Hély; Naofumi Homma; Akira Ito 002; et al. (ICCAD, 2020)

An Instruction Set Extension to Support Software-Based Masking. - Johann Großschädl; Ben Marshall; Dan Page; Thinh Hung Pham; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2020)

Friet: An Authenticated Encryption Scheme with Built-in Fault Detection. - Thierry Simon; Lejla Batina; Joan Daemen; Vincent Grosso; Pedro Maat Costa Massolino; Kostas Papagiannopoulos; Francesco Regazzoni 001; Niels Samwel (IACR Cryptol. ePrint Arch., 2020)

Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography. - Hamid Nejatollahi; Felipe Valencia; Subhadeep Banik; Francesco Regazzoni 001; Rosario Cammarota; Nikil D. Dutt (ACM Trans. Embed. Comput. Syst., 2020)

Swap and Rotate: Lightweight Linear Layers for SPN-based Blockciphers. - Subhadeep Banik; Fatih Balli; Francesco Regazzoni 001; Serge Vaudenay (IACR Trans. Symmetric Cryptol., 2020)

A Deeper Look at the Energy Consumption of Lightweight Block Ciphers. - Andrea Caforio; Fatih Balli; Subhadeep Banik; Francesco Regazzoni 001 (DATE, 2021)

Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks. - Ognjen Glamocanin; Dina G. Mahmoud; Francesco Regazzoni 001; Mirjana Stojilovic (DATE, 2021)

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. - Christian Pilato; Stanislav Böhm; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Vojtech Cima; Radim Cmar; Dionysios Diamantopoulos; Fabrizio Ferrandi; Jan Martinovic; Gianluca Palermo; Michele Paolino; et al. (DATE, 2021)

Post-Quantum Cryptography: Challenges and Opportunities for Robust and Secure HW Design. - Davide Bellizia; Nadia El Mrabet; Apostolos P. Fournaris; Simon Pontié; Francesco Regazzoni 001; François-Xavier Standaert; Élise Tasso; Emanuele Valea (DFT, 2021)

Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities. - Felipe Valencia; Ilia Polian; Francesco Regazzoni 001 (DSD, 2021)

Security, Reliability and Test Aspects of the RISC-V Ecosystem. - Jaume Abella 001; Sergi Alcaide; Jens Anders; Francisco Bas; Steffen Becker 001; Elke De Mulder; Nourhan Elhamawy; Frank K. Gürkaynak; Helena Handschuh; Carles Hernández 001; Michael Hutter; Leonidas Kosmidis; et al. (ETS, 2021)

Special Section on Attacking and Protecting Artificial Intelligence. - Shivam Bhasin; Siddharth Garg; Francesco Regazzoni 001 (CAAI Trans. Intell. Technol., 2021)

Protecting artificial intelligence IPs: a survey of watermarking and fingerprinting for machine learning. - Francesco Regazzoni 001; Paolo Palmieri 001; Fethulah Smailbegovic; Rosario Cammarota; Ilia Polian (CAAI Trans. Intell. Technol., 2021)

A High Speed Integrated Quantum Random Number Generator with on-Chip Real-Time Randomness Extraction. - Francesco Regazzoni 001; Emna Amri; Samuel Burri; Davide Rusca; Hugo Zbinden; Edoardo Charbon (CoRR, 2021)

High-Level Synthesis of Security Properties via Software-Level Abstractions. - Christian Pilato; Francesco Regazzoni 001 (CoRR, 2021)

Guest Editors' Introduction: Special Issue on Top Picks in Hardware and Embedded Security. - Rosario Cammarota; Francesco Regazzoni 001 (IEEE Des. Test, 2021)

Reducing the Cost of Machine Learning Differential Attacks Using Bit Selection and aPartial ML-Distinguisher. - Amirhossein Ebrahimi; Francesco Regazzoni 001; Paolo Palmieri 001 (IACR Cryptol. ePrint Arch., 2021)

Exploring Parallelism to Improve the Performance of FrodoKEM in Hardware. - James Howe; Marco Martinoli; Elisabeth Oswald; Francesco Regazzoni 001 (J. Cryptogr. Eng., 2021)

An Instruction Set Extension to Support Software-Based Masking. - Si Gao; Johann Großschädl; Ben Marshall; Dan Page; Thinh Hung Pham; Francesco Regazzoni 001 (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021)

Tool of Spies: Leaking your IP by Altering the 3D Printer Compiler. - Sujit Rokka Chhetri; Anomadarshi Barua; Sina Faezi; Francesco Regazzoni 001; Arquimedes Canedo; Mohammad Abdullah Al Faruque (IEEE Trans. Dependable Secur. Comput., 2021)

Protecting Hardware IP Cores During High-Level Synthesis. - Christian Pilato; Donatella Sciuto; Francesco Regazzoni 001; Siddharth Garg; Ramesh Karri (Behavioral Synthesis for Hardware Security, 2022)

On the Limitations of Logic Locking the Approximate Circuits. - Kartik Nayak; Devanshi Upadhyaya; Francesco Regazzoni 001; Ilia Polian (AsianHOST, 2022)

CCSW '22: The 2022 Cloud Computing Security Workshop. - Marten van Dijk; Francesco Regazzoni 001 (CCS, 2022)

Anomaly detection to improve security of big data analytics. - Tom Slooff; Francesco Regazzoni 001; Fabien Brocheton; Antonio Parodi; Radim Cmar (CF, 2022)

Optimizing Lattice-based Post-Quantum Cryptography Codes for High-Level Synthesis. - Andrea Guerrieri; Gabriel Da Silva Marques; Francesco Regazzoni 001; Andres Upegui (DSD, 2022)

Reducing the Cost of Machine Learning Differential Attacks Using Bit Selection and a Partial ML-Distinguisher. - Amirhossein Ebrahimi; Francesco Regazzoni 001; Paolo Palmieri 001 (FPS, 2022)

Bias Cancellation of MixColumns. - Subhadeep Banik; Andrea Caforio; Kostas Papagiannopoulos; Francesco Regazzoni 001 (SPACE, 2022)

Future Computer Systems and Networking Research in the Netherlands: A Manifesto. - Alexandru Iosup; Fernando Kuipers; Ana Lucia Varbanescu; Paola Grosso; Animesh Trivedi; Jan S. Rellermeyer; Lin Wang 015; Alexandru Uta; Francesco Regazzoni 001 (CoRR, 2022)

A Small GIFT-COFB: Lightweight Bit-Serial Architectures. - Andrea Caforio; Daniel Collins 001; Subhadeep Banik; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2022)

The Side-Channel Metric Cheat Sheet. - Kostas Papagiannopoulos; Ognjen Glamocanin; Melissa Azouaoui; Dorian Ros; Francesco Regazzoni 001; Mirjana Stojilovic (IACR Cryptol. ePrint Arch., 2022)

Experimental Evaluation of e.MMC Data Recovery. - Aya Fukami; Sasha Sheremetov; Francesco Regazzoni 001; Zeno J. M. H. Geradts; Cees de Laat (IEEE Trans. Inf. Forensics Secur., 2022)

Resource-Constrained Encryption: Extending Ibex with a QARMA Hardware Accelerator. - Mathijs De Kremer; Marco Brohet; Subhadeep Banik; Roberto Avanzi; Francesco Regazzoni 001 (ASAP, 2023)

Data Sanitization on eMMCs. - Aya Fukami; Francesco Regazzoni 001; Zeno J. M. H. Geradts (ASP-DAC, 2023)

CCSW '23: Cloud Computing Security Workshop. - Francesco Regazzoni 001; Apostolos P. Fournaris (CCS, 2023)

Running Longer To Slim Down: Post-Quantum Cryptography on Memory-Constrained Devices. - Apostolos P. Fournaris; George Tasopoulos; Marco Brohet; Francesco Regazzoni 001 (COINS, 2023)

Secrets Leaking Through Quicksand: Covert Channels in Approximate Computing. - Lorenzo Masciullo; Roberto Passerone; Francesco Regazzoni 001; Ilia Polian (ETS, 2023)

Invited Paper: Instruction Set Extensions for Post-Quantum Cryptography. - Marco Brohet; Felipe Valencia; Francesco Regazzoni 001 (ICCAD, 2023)

Data Under Siege: The Quest for the Optimal Convolutional Autoencoder in Side-Channel Attacks. - Danny van den Berg; Tom Slooff; Marco Brohet; Kostas Papagiannopoulos; Francesco Regazzoni 001 (IJCNN, 2023)

Application-specific FPGAs: cryptographic agility through customized reconfigurable architectures. - Jelle Biesmans; Francesco Regazzoni 001; Nele Mentens (IPDPS Workshops, 2023)

H-Saber: An FPGA-Optimized Version for Designing Fast and Efficient Post-Quantum Cryptography Hardware Accelerators. - Andrea Guerrieri; Gabriel Da Silva Marques; Francesco Regazzoni 001; Andres Upegui (ISQED, 2023)

Treating a different kind of patient: curing security weaknesses in digital health systems of the future. - Francesco Regazzoni 001; Paolo Palmieri 001; Apostolos P. Fournaris (IWASI, 2023)

The Side-channel Metrics Cheat Sheet. - Kostas Papagiannopoulos; Ognjen Glamocanin; Melissa Azouaoui; Dorian Ros; Francesco Regazzoni 001; Mirjana Stojilovic (ACM Comput. Surv., 2023)

The tweakable block cipher family QARMAv2. - Roberto Avanzi; Subhadeep Banik; Orr Dunkelman; Maria Eichlseder; Shibam Ghosh; Marcel Nageler; Francesco Regazzoni 001 (IACR Cryptol. ePrint Arch., 2023)

The QARMAv2 Family of Tweakable Block Ciphers. - Roberto Avanzi; Subhadeep Banik; Orr Dunkelman; Maria Eichlseder; Shibam Ghosh; Marcel Nageler; Francesco Regazzoni 001 (IACR Trans. Symmetric Cryptol., 2023)

A Visionary Look at the Security of Reconfigurable Cloud Computing. - Mirjana Stojilovic; Kasper Rasmussen; Francesco Regazzoni 001; Mehdi B. Tahoori; Russell Tessier (Proc. IEEE, 2023)

Robust and Energy-efficient Hardware Architectures for DIZY Stream Cipher. - Martin Schmid; Tolga Arul; Elif Bilge Kavun; Francesco Regazzoni 001; Orhun Kara (APCCAS, 2024)

Energy Analysis of Cryptographic Algorithms in Server Environment. - Sushmita Thakur; Subhadeep Banik; Francesco Regazzoni 001 (CCSW@CCS, 2024)

MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems. - Francesca Palumbo; Maria Katiuscia Zedda; Tiziana Fanni; Alessandra Bagnato; Luca Castello; Jerónimo Castrillón; Roberto Del Ponte; Yansha Deng; Bart Driessen; Mauro Fadda; Tristan Halna du Fretay; Julio de Oliveira Filho; et al. (CF (Companion), 2024)

SECURED for Health: Scaling Up Privacy to Enable the Integration of the European Health Data Space. - Francesco Regazzoni 001; Gergely Ács; Albert Zoltan Aszalos; Christos Avgerinos; Nikolaos Bakalos; Josep Lluis Berral; Joppe W. Bos; Marco Brohet; Andrés G. Castillo Sanz; Gareth T. Davies; Stefanos Florescu; Pierre-Elisée Flory; et al. (DATE, 2024)

Demonstrating Post-Quantum Remote Attestation for RISC-V Devices. - Maximilian Barger; Marco Brohet; Francesco Regazzoni 001 (DATE, 2024)

A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. - Christian Pilato; Subhadeep Banik; Jakub Beránek; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Radim Cmar; Serena Curzel; Fabrizio Ferrandi; Karl F. A. Friebel; Antonella Galizia; Matteo Grasso; et al. (DATE, 2024)

Defending the Citadel: Fault Injection Attacks Against Dynamic Information Flow Tracking and Related Countermeasures. - William Pensec; Francesco Regazzoni 001; Vianney Lapotre; Guy Gogniat (ISVLSI, 2024)

Faster and More Energy-Efficient Equation Solvers over GF(2). - Subhadeep Banik; Francesco Regazzoni 001 (SPACE, 2024)

120 Domain-Specific Languages for Security. - Markus Krausz; Sven Peldszus; Francesco Regazzoni 001; Thorsten Berger; Tim Güneysu (CoRR, 2024)

Tipping the Balance: Imbalanced Classes in Deep-Learning Side-Channel Analysis. - Stjepan Picek; Annelie Heuser; Alan Jovic; Shivam Bhasin; Francesco Regazzoni 001 (IEEE Des. Test, 2024)

Compact Circuits for Efficient Möbius Transform. - Subhadeep Banik; Francesco Regazzoni 001 (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

A Survey on Thwarting Memory Corruption in RISC-V. - Marco Brohet; Francesco Regazzoni 001 (ACM Comput. Surv., 2024)

Special Issue on Post-Quantum Cryptography for Embedded Systems. - Shivam Bhasin; Fabrizio De Santis; Francesco Regazzoni 001 (ACM Trans. Embed. Comput. Syst., 2024)

Architectures for Sustainable Security in the Computing Continuum. - Francesco Regazzoni 001 (ASAP, 2025)

Enabling Quantum-Resistant EDHOC: Design and Performance Evaluation. - Lidia Pocero Fraile; Georgios Tasopoulos; Christos Koulamas; Raymond K. Zhao; Nazatul Haque Sultan; Francesco Regazzoni 001; Apostolos P. Fournaris (IEEE Access, 2025)

120 Domain-Specific Languages for Security (Supplementary Material). - Markus Krausz; Sven Peldszus; Francesco Regazzoni 001; Thorsten Berger; Tim Güneysu (Zenodo, 2025)