A BiCMOS Tunable Shaper for Detectors of Elementary Particles. - Andrea Baschirotto; Giovanni Cesura; Francesco Rezzi; Francesco Svelto (ISCAS, 1993)

Measurement and modeling of Si integrated inductors. - Paolo Arcioni; Rinaldo Castello; Giuseppe De Astis; Enrico Sacchi; Francesco Svelto (IEEE Trans. Instrum. Meas., 1998)

Very accurate high-frequency noise spectral analysis of P-channel FET's. - Francesco Svelto (IEEE Trans. Instrum. Meas., 1998)

A 1.3 GHz CMOS VCO with 28% frequency tuning. - Francesco Svelto; Stefano Deantoni; Rinaldo Castello (CICC, 1999)

A low-voltage topology for CMOS RF mixers. - Francesco Svelto; Matteo Conta; Valentina Della Torre; Rinaldo Castello (IEEE Trans. Consumer Electron., 1999)

A 1 mA, -120.5 dbc/Hz at 600 kHz from 1.9 GHz fully tuneable LC CMOS VCO. - Francesco Svelto; Stefano Deantoni; Rinaldo Castello (CICC, 2000)

Solutions for image rejection CMOS LNA. - Francesco Svelto; Giampiero Montagna; Stefano Deantoni; Giulio Braschi; Rinaldo Castello (ISCAS, 2000)

An 8mA, 3.8dB NF, 40dB gain CMOS front-end for GPS applications. - Francesco Svelto; Stefano Deantoni; Giampiero Montagna; Rinaldo Castello (ISLPED, 2000)

A 1.3 GHz low-phase noise fully tunable CMOS LC VCO. - Francesco Svelto; Stefano Deantoni; Rinaldo Castello (IEEE J. Solid State Circuits, 2000)

A 2-dB noise figure 900-MHz differential CMOS LNA. - Francesco Gatta; Enrico Sacchi; Francesco Svelto; Paolo Vilmercati; Rinaldo Castello (IEEE J. Solid State Circuits, 2001)

Implementation of a CMOS LNA plus mixer for GPS applications with no external components. - Francesco Svelto; Stefano Deantoni; Giampiero Montagna; Rinaldo Castello (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Analysis and optimization of IIP2 in CMOS direct down-converters. - Danilo Manstretta; Francesco Svelto (CICC, 2002)

Injection locking LC dividers for low power quadrature generation. - Andrea Mazzanti; Paola Uggetti; Paolo Rossi; Francesco Svelto (CICC, 2003)

Second-order intermodulation mechanisms in CMOS downconverters. - Danilo Manstretta; Massimo Brandolini; Francesco Svelto (IEEE J. Solid State Circuits, 2003)

Design space exploration for a UMTS front-end exploiting analog platforms. - F. De Bernarclinis; S. Gambini; R. Vincis; Francesco Svelto (ICCAD, 2004)

Analysis and design of a dual band reconfigurable VCO. - Andrea Mazzanti; Paola Uggetti; Raffaele Battaglia; Francesco Svelto (ICECS, 2004)

A fully integrated 0.18-μm CMOS direct conversion receiver front-end with on-chip LO for UMTS. - Francesco Gatta; Danilo Manstretta; Paolo Rossi; Francesco Svelto (IEEE J. Solid State Circuits, 2004)

Analysis and design of injection-locked LC dividers for quadrature generation. - Andrea Mazzanti; Paola Uggetti; Francesco Svelto (IEEE J. Solid State Circuits, 2004)

An interference robust 0.18μm CMOS 3.1-8GHz receiver front-end for UWB radio. - Giuseppe Cusmai; Massimo Brandolini; Paolo Rossi; Francesco Svelto (CICC, 2005)

Balanced CMOS LC-tank analog frequency dividers for quadrature LO generation. - Andrea Mazzanti; Luca Larcher; Francesco Svelto (CICC, 2005)

Hybrid cascode compensation for two-stage CMOS operational amplifiers. - Mohammad Yavari; Omid Shoaei; Francesco Svelto (ISCAS (2), 2005)

A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications. - Paolo Rossi; Antonio Liscidini; Massimo Brandolini; Francesco Svelto (IEEE J. Solid State Circuits, 2005)

Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers. - Andrea Bevilacqua; Francesco Svelto (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

A 750mV 15kHz 1/f Noise Corner 51dBm IIP2 Direct-Conversion Front-End for GSM in 90nm CMOS. - Massimo Brandolini; Marco Sosio; Francesco Svelto (ISSCC, 2006)

A 20mw 3.24mm2 fully integrated gps radio for cell-phones. - Valentina Della Torre; Matteo Conta; Ramesh Chokkalingam; Giuseppe Cusmai; Paolo Rossi; Francesco Svelto (ISSCC, 2006)

A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers. - Massimo Brandolini; Paolo Rossi; Davide Sanzogni; Francesco Svelto (IEEE J. Solid State Circuits, 2006)

A 0.18-$muhbox m$CMOS Selective Receiver Front-End for UWB Applications. - Giuseppe Cusmai; Massimo Brandolini; Paolo Rossi; Francesco Svelto (IEEE J. Solid State Circuits, 2006)

Analysis of reliability and power efficiency in cascode class-E PAs. - Andrea Mazzanti; Luca Larcher; Riccardo Brama; Francesco Svelto (IEEE J. Solid State Circuits, 2006)

CMOS injection locked oscillators for quadrature generation at radio-frequency. - Andrea Mazzanti; Francesco Svelto (Microelectron. J., 2006)

A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracy. - Andrea Mazzanti; Francesco Svelto (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

A 1.7-GHz 31dBm differential CMOS Class-E Power Amplifier with 58% PAE. - Riccardo Brama; Luca Larcher; Andrea Mazzanti; Francesco Svelto (CICC, 2007)

A 3.2-to-7.3GHz Quadrature Oscillator with Magnetic Tuning. - Giuseppe Cusmai; Matteo Repossi; Guido Albasini; Francesco Svelto (ISSCC, 2007)

A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS. - Massimo Brandolini; Marco Sosio; Francesco Svelto (IEEE J. Solid State Circuits, 2007)

A Magnetically Tuned Quadrature Oscillator. - Giuseppe Cusmai; Matteo Repossi; Guido Albasini; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2007)

A 20 mW 3.24mm2 Fully Integrated GPS Radio for Location Based Services. - Valentina Della Torre; Matteo Conta; Ramesh Chokkalingam; Giuseppe Cusmai; Paolo Rossi; Francesco Svelto (IEEE J. Solid State Circuits, 2007)

CMOS balanced regenerative frequency dividers for wide-band quadrature LO generation. - Andrea Mazzanti; Luca Larcher; Francesco Svelto (Microelectron. J., 2007)

A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR. - Simone Erba; Massimo Pozzoni; Matteo Pisati; Riccardo Brama; Davide Sanzogni; Emanuele Depaoli; Paolo Viola; Francesco Svelto (CICC, 2008)

Architectures and Circuit Techniques for Nanoscale RF CMOS (Forum). - Stefan Heinen; Francesco Svelto; Jan Craninckx; Mototsugu Hamada; Domine Leenaerts; Chris Rudell (ISSCC, 2008)

A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS. - Andrea Mazzanti; Marco Sosio; Matteo Repossi; Francesco Svelto (ISSCC, 2008)

A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital Converter Calibration and Mismatch Correction. - Colin Weltin-Wu; Enrico Temporiti; Daniele Baldi; Francesco Svelto (ISSCC, 2008)

A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications. - Riccardo Brama; Luca Larcher; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2008)

A sliding IF receiver for mm-wave WLANs in 65nm CMOS. - Stefano Bozzola; Davide Guermandi; Federico Vecchi; Matteo Repossi; Massimo Pozzoni; Andrea Mazzanti; Francesco Svelto (CICC, 2009)

A 5.2mW ku-band CMOS injection-locked frequency doubler with differential input / output. - Enrico Monaco; Mattia Borgarino; Francesco Svelto; Andrea Mazzanti (CICC, 2009)

Insights into wideband fractional All-Digital PLLs for RF applications. - Enrico Temporiti; Colin Weltin-Wu; Daniele Baldi; Riccardo Tonietto; Francesco Svelto (CICC, 2009)

A reconfigurable demodulator with 3-to-5GHz agile synthesizer for 9-band WiMedia UWB in 65nm CMOS. - Andrea Mazzanti; Mohammad B. Vahidfar; Marco Sosio; Francesco Svelto (ISSCC, 2009)

A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication. - Massimo Pozzoni; Simone Erba; Paolo Viola; Matteo Pisati; Emanuele Depaoli; Davide Sanzogni; Riccardo Brama; Daniele Baldi; Matteo Repossi; Francesco Svelto (IEEE J. Solid State Circuits, 2009)

A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques. - Enrico Temporiti; Colin Weltin-Wu; Daniele Baldi; Riccardo Tonietto; Francesco Svelto (IEEE J. Solid State Circuits, 2009)

Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations. - Federico Vecchi; Matteo Repossi; Wissam Eyssa; Paolo Arcioni; Francesco Svelto (IEEE J. Solid State Circuits, 2009)

A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS. - Andrea Mazzanti; Enrico Monaco; Massimo Pozzoni; Francesco Svelto (ISSCC, 2010)

A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization. - Massimo Pozzoni; Simone Erba; Davide Sanzogni; Marcello Ganzerli; Paolo Viola; Daniele Baldi; Matteo Repossi; Giorgio Spelgatti; Francesco Svelto (ISSCC, 2010)

A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators. - Federico Vecchi; Stefano Bozzola; Massimo Pozzoni; Davide Guermandi; Enrico Temporiti; Matteo Repossi; Ugo Decanis; Andrea Mazzanti; Francesco Svelto (ISSCC, 2010)

A 3.5GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation. - Colin Weltin-Wu; Enrico Temporiti; Daniele Baldi; Marco Cusmai; Francesco Svelto (ISSCC, 2010)

A Low Phase-Noise Multi-Phase LO Generator for Wideband Demodulators Based on Reconfigurable Sub-Harmonic Mixers. - Andrea Mazzanti; Mohammad B. Vahidfar; Marco Sosio; Francesco Svelto (IEEE J. Solid State Circuits, 2010)

Injection-Locked CMOS Frequency Doublers for μ -Wave and mm-Wave Applications. - Enrico Monaco; Massimo Pozzoni; Francesco Svelto; Andrea Mazzanti (IEEE J. Solid State Circuits, 2010)

A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through TDC Dithering and Feedforward Compensation. - Enrico Temporiti; Colin Weltin-Wu; Daniele Baldi; Marco Cusmai; Francesco Svelto (IEEE J. Solid State Circuits, 2010)

Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs. - Colin Weltin-Wu; Enrico Temporiti; Marco Cusmai; Daniele Baldi; Francesco Svelto (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A mm-Wave quadrature VCO based on magnetically coupled resonators. - Ugo Decanis; Andrea Ghilioni; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (ISSCC, 2011)

A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz. - Andrea Ghilioni; Ugo Decanis; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (ISSCC, 2011)

A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves. - Ugo Decanis; Andrea Ghilioni; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2011)

A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS. - Federico Vecchi; Stefano Bozzola; Enrico Temporiti; Davide Guermandi; Massimo Pozzoni; Matteo Repossi; Marco Cusmai; Ugo Decanis; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2011)

A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS. - Andrea Mazzanti; Marco Sosio; Matteo Repossi; Francesco Svelto (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz. - Andrea Ghilioni; Ugo Decanis; Andrea Mazzanti; Francesco Svelto (CICC, 2012)

A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4. - Dan Li; Gabriele Minoia; Matteo Repossi; Daniele Baldi; Enrico Temporiti; Andrea Mazzanti; Francesco Svelto (ESSCIRC, 2012)

A 90Vpp 720MHz GBW linear power amplifier for ultrasound imaging transmitters in BCD6-SOI. - Dario Bianchi; Fabio Quaglia; Andrea Mazzanti; Francesco Svelto (ISSCC, 2012)

High-voltage integrated Class-B amplifier for ultrasound transducers. - Dario Bianchi; Fabio Quaglia; Andrea Mazzanti; Francesco Svelto (ICICDT, 2013)

A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension. - Enrico Mammei; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (ISSCC, 2013)

Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic Latches With Load Modulation. - Andrea Ghilioni; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2013)

A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies. - Enrico Temporiti; Gabriele Minoia; Matteo Repossi; Daniele Baldi; Andrea Ghilioni; Francesco Svelto (ESSCIRC, 2014)

A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP. - Junlei Zhao; Matteo Bassi; Andrea Bevilacqua; Andrea Ghilioni; Andrea Mazzanti; Francesco Svelto (ESSCIRC, 2014)

A Low-Noise Design Technique for High-Speed CMOS Optical Receivers. - Dan Li; Gabriele Minoia; Matteo Repossi; Daniele Baldi; Enrico Temporiti; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2014)

Analysis and Design of a High Voltage Integrated Class-B Amplifier for Ultra-Sound Transducers. - Dario Bianchi; Fabio Quaglia; Andrea Mazzanti; Francesco Svelto (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A 15 GHz-bandwidth 20dBm PSAT power amplifier with 22% PAE in 65nm CMOS. - Junlei Zhao; Matteo Bassi; Andrea Mazzanti; Francesco Svelto (CICC, 2015)

22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s. - Marco Cignoli; Gabriele Minoia; Matteo Repossi; Daniele Baldi; Andrea Ghilioni; Enrico Temporiti; Francesco Svelto (ISSCC, 2015)

A 40-67 GHz Power Amplifier With 13 dBm ℙSAT and 16% PAE in 28 nm CMOS LP. - Matteo Bassi; Junlei Zhao; Andrea Bevilacqua; Andrea Ghilioni; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2015)

A multi-core VCO and a frequency quadrupler for E-Band adaptive-modulation links in 55nm BiCMOS. - Lorenzo Iotti; Andrea Mazzanti; Francesco Svelto (ESSCIRC, 2016)

A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. - Dan Li; Gabriele Minoia; Matteo Repossi; Daniele Baldi; Andrea Ghilioni; Enrico Temporiti; Francesco Svelto (ISCAS, 2016)

23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies. - Enrico Temporiti; Gabriele Minoia; Matteo Repossi; Daniele Baldi; Andrea Ghilioni; Francesco Svelto (ISSCC, 2016)

Insights Into Silicon Photonics Mach-Zehnder-Based Optical Transmitter Architectures. - Enrico Temporiti; Andrea Ghilioni; Gabriele Minoia; Piero Orlandi; Matteo Repossi; Daniele Baldi; Francesco Svelto (IEEE J. Solid State Circuits, 2016)

2.6 A SiGe BiCMOS E-band power amplifier with 22% PAE at 18dBm OP1dB and 8.5% at 6dB back-off leveraging current clamping in a common-base stage. - Junlei Zhao; Elham Rahimi; Francesco Svelto; Andrea Mazzanti (ISSCC, 2017)

Design of low-power wideband frequency quadruplers based on transformer-coupled resonators for E-Band backhaul applications. - Lorenzo Iotti; Matteo Bassi; Andrea Mazzanti; Francesco Svelto (Integr., 2017)

Insights Into Phase-Noise Scaling in Switch-Coupled Multi-Core LC VCOs for E-Band Adaptive Modulation Links. - Lorenzo Iotti; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2017)

Low phase noise K-band VCO and high efficiency E-band power amplifier for mobile network backhaul in SiGe BiCMOS. - Andrea Mazzanti; Elham Rahimi; Niccolo Lacaita; Junlei Zhao; Matteo Bassi; Francesco Svelto (ICICDT, 2018)

A >40dB IRR, 44% fractional-bandwidth ultra-wideband mm-wave quadrature LO generator for 5G networks in 55nm CMOS. - Farshad Piri; Matteo Bassi; Niccolo Lacaita; Andrea Mazzanti; Francesco Svelto (ISSCC, 2018)

A K-band low-noise bipolar class-C VCO for 5G backhaul systems in 55 nm BiCMOS technology. - Niccolo Lacaita; Matteo Bassi; Andrea Mazzanti; Francesco Svelto (Integr., 2018)

A PVT-Tolerant >40-dB IRR, 44% Fractional-Bandwidth Ultra-Wideband mm-Wave Quadrature LO Generator for 5G Networks in 55-nm CMOS. - Farshad Piri; Matteo Bassi; Niccolo Lacaita; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2018)

A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity. - Farhad Bozorgi; Melchiorre Bruccoleri; Matteo Repossi; Enrico Temporiti; Andrea Mazzanti; Francesco Svelto (ESSCIRC, 2019)

70-90-GHz Self-Tuned Polyphase Filter for Wideband I/Q LO Generation in a 55-nm BiCMOS Transmitter. - Farshad Piri; Elham Rahimi; Matteo Bassi; Francesco Svelto; Andrea Mazzanti (ESSCIRC, 2019)

High-Efficiency SiGe-BiCMOS $E$ -Band Power Amplifiers Exploiting Current Clamping in the Common-Base Stage. - Elham Rahimi; Junlei Zhao; Francesco Svelto; Andrea Mazzanti (IEEE J. Solid State Circuits, 2019)

Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology. - Farhad Bozorgi; Melchiorre Bruccoleri; Elham Rahimi; Matteo Repossi; Francesco Svelto; Andrea Mazzanti (IEEE J. Solid State Circuits, 2022)

Overcoming the Transimpedance Limit: A Tutorial on Design of Low-Noise TIA. - Dan Li 011; Li Geng; Franco Maloberti; Francesco Svelto (IEEE Trans. Circuits Syst. II Express Briefs, 2022)