Single-chip FPGA implementation of a cryptographic co-processor. - Francis M. Crowe; Alan Daly; Tim Kerins; William P. Marnane (FPT, 2004)

A Scalable Dual Mode Arithmetic Unit for Public Key Cryptosystems. - Francis M. Crowe; Alan Daly; William P. Marnane (ITCC (1), 2005)

FPGA Implementation of a GF(2m) Tate Pairing Architecture. - Maurice Keller; Tim Kerins; Francis M. Crowe; William P. Marnane (ARC, 2006)

Optimisation of the SHA-2 Family of Hash Functions on FPGAs. - Robert P. McEvoy; Francis M. Crowe; Colin C. Murphy; William P. Marnane (ISVLSI, 2006)

SPA resistant elliptic curve cryptosystem using addition chains. - Andrew Byrne; Francis M. Crowe; William P. Marnane; Nicolas Méloni; Arnaud Tisserand; Emanuel M. Popovici (Int. J. High Perform. Syst. Archit., 2007)