Modeling and optimization of inductors with patterned ground shields for a high performance fully integrated switched tuning VCO. - Francis M. Rotella; Jeffrey Zachan (CICC, 2002)

Characterization, design, modeling, and model validation of silicon-wafer M: N balun components under matched and unmatched conditions. - Francis M. Rotella; Cristian Cismaru; Yevgeniy Gene Tkachenko; Yuhua Cheng; Peter J. Zampardi (IEEE J. Solid State Circuits, 2006)

A 40-to-44Gb/s 3? Oversampling CMOS CDR/1: 16 DEMUX. - Nikola Nedovic; Nestoras Tzartzanis; Hirotaka Tamura; Francis M. Rotella; Magnus Wiklund; Yuma Mizutani; Yusuke Okaniwa; Tadahiro Kuroda; Junji Ogawa; William W. Walker (ISSCC, 2007)

A 40-44 Gb/s 3 × Oversampling CMOS CDR/1: 16 DEMUX. - Nikola Nedovic; Nestoras Tzartzanis; Hirotaka Tamura; Francis M. Rotella; Magnus Wiklund; Yuma Mizutani; Yusuke Okaniwa; Tadahiro Kuroda; Junji Ogawa; William W. Walker (IEEE J. Solid State Circuits, 2007)

Key Aspects in Modeling of Thin Epi SOS Technology With Application of BSIMSOI. - James P. Roach; Lee-Wen Chen; Peter Clarke; Amit Dikshit; Francis M. Rotella (IEEE J. Solid State Circuits, 2011)