Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application. - Björn Osterloh; Harald Michalik; Björn Fiethe; Frank Bubenhagen (AHS, 2007)

Architecture verification of the SoCWire NoC approach for safe dynamic partial reconfiguration in space applications. - Björn Osterloh; Harald Michalik; Björn Fiethe; Frank Bubenhagen (AHS, 2010)

AMBA to SoCWire network on Chip bridge as a backbone for a Dynamic Reconfigurable Processing unit. - Holger Michel; Frank Bubenhagen; Björn Fiethe; Harald Michalik; Björn Osterloh; Wayne Sullivan; Alex Wishart; Jørgen Ilstad; Sandi Habinc (AHS, 2011)

Adaptive hardware by dynamic reconfiguration for the Solar Orbiter PHI instrument. - Björn Fiethe; Frank Bubenhagen; Tobias Lange 002; Harald Michalik; Holger Michel; Joachim Woch; Johann Hirzberger (AHS, 2012)

The SoCWire protocol (SoCP): A flexible and minimal protocol for a Network-on-Chip. - Holger Michel; Adrian Belger; Frank Bubenhagen; Björn Fiethe; Harald Michalik; Wayne Sullivan; Alex Wishart; Jørgen Ilstad (AHS, 2012)

Reconfigurable platforms for Data Processing on scientific space instruments. - Frank Bubenhagen; Björn Fiethe; Tobias Lange 002; Harald Michalik; Holger Michel (AHS, 2013)

Worst case error rate predictions and mitigation schemes for Virtex-4 FPGAs on solar orbiter. - Holger Michel; Frank Bubenhagen; Kai Grurmann; Tobias Lange 002; Björn Fiethe; Harald Michalik (AHS, 2013)

Analysis and Enhancement of a Fault-Tolerant NoC for SRAM-based FPGAs in Space Applications (Analyse und Erweiterung eines fehler-toleranten NoC für SRAM-basierte FPGAs in Weltraumapplikationen) - Frank Bubenhagen (2020)