# Frank Liu

According to our database

Collaborative distances:

^{1}, Frank Liu authored at least 75 papers between 2002 and 2020.Collaborative distances:

## Awards

## IEEE Fellow

IEEE Fellow 2017, "For contributions to design for manufacturability of VLSI circuits".

## Timeline

#### Legend:

Book In proceedings Article PhD thesis Other## Links

#### On csauthors.net:

## Bibliography

2020

CoRR, 2020

Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

Deffe: a data-efficient framework for performance characterization in domain-specific computing.

Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

CoRR, 2019

Proceedings of the 31st International Conference on Scientific and Statistical Database Management, 2019

Proceedings of the 18th IEEE International Conference On Machine Learning And Applications, 2019

Video-Text Compliance: Activity Verification Based on Natural Language Instructions.

Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019

A Memory-Efficient Markov Decision Process Computation Framework Using BDD-based Sampling Representation.

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Optimization of Genomics Analysis Pipeline for Scalable Performance in a Cloud Environment.

Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2018

2017

Beautiful and Damned. Combined Effect of Content Quality and Social Ties on User Engagement.

IEEE Trans. Knowl. Data Eng., 2017

IEEE Des. Test, 2017

CoRR, 2017

Proceedings of the 8th ACM International Conference on Bioinformatics, 2017

SparkGA: A Spark Framework for Cost Effective, Fast and Accurate DNA Analysis at Scale.

Proceedings of the 8th ACM International Conference on Bioinformatics, 2017

2016

IEEE Des. Test, 2016

Proceedings of the 2016 IEEE-EMBS International Conference on Biomedical and Health Informatics, 2016

2015

Efficient Transient Analysis of Power Delivery Network With Clock/Power Gating by Sparse Approximation.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Proceedings of the 2015 IEEE Winter Conference on Applications of Computer Vision, 2015

Proceedings of the 8th Workshop on High Performance Computational Finance, 2015

2014

Found. Trends Electron. Des. Autom., 2014

Environ. Model. Softw., 2014

Proceedings of the Euro-Par 2014 Parallel Processing, 2014

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Proceedings of the 11th IEEE Consumer Communications and Networking Conference, 2014

2013

A 0.026mm<sup>2</sup> 5.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter.

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

Proceedings of the IEEE International Conference on IC Design & Technology, 2012

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Statistical Modeling and Simulation of Threshold Variation Under Random Dopant Fluctuations and Line-Edge Roughness.

IEEE Trans. Very Large Scale Integr. Syst., 2011

Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Proceedings of the Design, Automation and Test in Europe, 2011

2010

The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis.

IEEE Trans. Very Large Scale Integr. Syst., 2010

Modeling and Analysis of the Nonrectangular Gate Effect for Postlithography Circuit Simulation.

IEEE Trans. Very Large Scale Integr. Syst., 2010

IEEE Des. Test Comput., 2010

Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation.

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

IEEE Trans. Very Large Scale Integr. Syst., 2009

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Variability analysis under layout pattern-dependent rapid-thermal annealing process.

Proceedings of the 46th Design Automation Conference, 2009

Proceedings of the 46th Design Automation Conference, 2009

2008

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness.

Proceedings of the 45th Design Automation Conference, 2008

2007

IEEE Trans. Very Large Scale Integr. Syst., 2007

IEEE Trans. Very Large Scale Integr. Syst., 2007

A computer vision method to locate cold spots in foods in microwave sterilization processes.

Pattern Recognit., 2007

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Proceedings of the 44th Design Automation Conference, 2007

Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation.

Proceedings of the 44th Design Automation Conference, 2007

Proceedings of the 44th Design Automation Conference, 2007

A New Methodology for Interconnect Parasitics Extraction Considering Photo-Lithography Effects.

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Practical variation-aware interconnect delay and slew analysis for statistical timing verification.

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction.

Proceedings of the 2005 Design, 2005

A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis.

Proceedings of the 42nd Design Automation Conference, 2005

2004

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Closed-form expressions for extending step delay and slew metrics to ramp inputs for RC trees.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals.

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Proceedings of the 41th Design Automation Conference, 2004

2003

Proceedings of the 2003 International Symposium on Physical Design, 2003

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits.

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Proceedings of the 40th Design Automation Conference, 2003

2002

Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002