A 14-bit 100-Msample/s subranging ADC. - Carl Moreland; Frank Murden; Michael Elliott; Joe Young; Mike Hensley; Russell Stop (IEEE J. Solid State Circuits, 2000)

A dual channel IF-digitizing IC with 117dB dynamic range at 300Mhz IF for EDGE/GSM base-stations [receiver]. - Mike Hensley; Carroll Speir; Russell Stop; Kevin Behel; Carl Moreland; Greg Patterson; Dan Kelly; Manish Manglani; Michael Elliott; Scott Puckett; Joe Young; Frank Murden (CICC, 2004)

A polar modulator transmitter for GSM/EDGE. - Michael R. Elliott; Tony Montalvo; Brad P. Jeffries; Frank Murden; Jon Strange; Allen Hill; Sanjay Nandipaku; Johannes Harrebek (IEEE J. Solid State Circuits, 2004)

A 16b 80MS/s 100mW 77.6dB SNR CMOS pipeline ADC. - Janet Brunsilius; Eric Siragusa; Steve Kosic; Frank Murden; Ege Yetis; Binh Luu; Jeff Bray; Phil Brown; Allen Barlow (ISSCC, 2011)

16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steve Kosic; Tao Pan; José B. Silva; Janet Brunsilius; Daniel Rey-Losada; Frank Murden; Carroll Speir; Jeff Bray; Eric Otte; et al. (ISSCC, 2017)

A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology. - Siddharth Devarajan; Larry Singer; Dan Kelly; Tao Pan; José B. Silva; Janet Brunsilius; Daniel Rey-Losada; Frank Murden; Carroll Speir; Jeff Bray; Eric Otte; Nevena Rakuljic; et al. (IEEE J. Solid State Circuits, 2017)