A maximally-digital radio receiver front-end. - Frank Opteynde (ISSCC, 2010)

A 40nm CMOS all-digital fractional-N synthesizer without requiring calibration. - Frank Opteynde (ISSCC, 2012)

28.3 A 125MHz-BW 71.9dB-SNDR VCO-based CT ΔΣ ADC with segmented phase-domain ELD compensation in 16nm CMOS. - Sheng-Jui Huang; Nathan Egan; Divya Kesharwani; Frank Opteynde; Michael Ashburn (ISSCC, 2017)