Boundary scan test used at board level: moving towards reality. - Frans G. M. de Jong (ITC, 1990)

Testing the Integrity of the Boundary Scan Test Infrastructure. - Frans G. M. de Jong; Frank van der Heyden (ITC, 1991)

Memory Interconnection Test at Board Level. - Frans G. M. de Jong; Adriaan J. de Lind van Wijngaarden (ITC, 1992)

Static component interconnect test technology (SCITT) a new technology for assembly testing. - Alex S. Biewenga; Henk D. L. Hollmann; Frans G. M. de Jong; Maurice Lousberg (ITC, 1999)

SCITT: Back to Basics in Mass Production Testing. - Frans G. M. de Jong (ITC, 1999)

Static component interconnection test technology in practice. - Frans G. M. de Jong; Rob Raaijmakers (ITC, 1999)

Power pin testing: making the test coverage complete. - Frans G. M. de Jong; Ben Kup; Rodger Schuttert (ITC, 2000)

System-level DFT for consumer products. - D. C. L. (Erik) van Geest; Frans G. M. de Jong (ETW, 2001)

Testing and programming flash memories on assemblies during high volume production. - Frans G. M. de Jong; Alex S. Biewenga; D. C. L. (Erik) van Geest; T. F. Waayers (ITC, 2001)

Improved Test Monitor Circuit in Power Pin DfT. - Rodger Schuttert; Frans G. M. de Jong; Ben Kup (VTS, 2002)

IEEE P1581: To Live or Let die? - Frans G. M. de Jong; Leon van de Logt (ITC, 2003)

Board Test Coverage: The Value of Prediction and How to Compare Numbers. - Wouter Rijckaert; Frans G. M. de Jong (ITC, 2003)

SiP-TAP: JTAG for SiP. - Frans G. M. de Jong; Alex S. Biewenga (ITC, 2006)

SiP-test: Predicting delivery quality. - Alex S. Biewenga; Frans G. M. de Jong (ITC, 2007)

Analog Test Bus Infrastructure for RF/AMS Modules in Core-Based Design. - Vladimir A. Zivkovic; Frank van der Heyden; Guido Gronthoud; Frans G. M. de Jong (ETS, 2008)