A methodology for NBTI circuit reliability at reduced power consumption using dual supply voltage. - Freddy Forero; Andres F. Gomez; Víctor H. Champac (LATS, 2016)

Improvement of Negative Bias Temperature Instability Circuit Reliability and Power Consumption Using Dual Supply Voltage. - Freddy Forero; Andres F. Gomez; Víctor H. Champac (J. Low Power Electron., 2016)

Analysis of short defects in FinFET based logic cells. - Freddy Forero; Jean-Marc Gallière; Michel Renovell; Víctor H. Champac (LATS, 2017)

Analysis of Bridge Defects in STT-MRAM Cells Under Process Variations and a Robust DFT Technique for Their Detection. - Víctor H. Champac; Andres F. Gomez; Freddy Forero; Kaushik Roy 001 (VLSI-SoC (Selected Papers), 2018)

Robust Detection of Bridge Defects in STT-MRAM Cells Under Process Variations. - Andres F. Gomez; Freddy Forero; Kaushik Roy 001; Víctor H. Champac (VLSI-SoC, 2018)

Detectability Challenges of Bridge Defects in FinFET Based Logic Cells. - Freddy Forero; Jean-Marc Gallière; Michel Renovell; Víctor H. Champac (J. Electron. Test., 2018)

B-open: A New Defect in Nanometer Technologies due to SADP Process. - Freddy Forero; Michel Renovell; Víctor H. Champac (ETS, 2019)

A Semi-analytical Model for Interconnect Open Defects in FinFET Logic Cells. - Freddy Forero; Jean-Marc Gallière; Michel Renovell; Víctor H. Champac (LATS, 2019)

Modeling and Detectability of Full Open Gate Defects in FinFET Technology. - Freddy Forero; Hector Villacorta; Michel Renovell; Víctor H. Champac (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A New Defect Model due to a Dust Particle Affecting the Fingers of FinFET Logic Gates. - Víctor H. Champac; Freddy Forero; Michel Renovell; Leonardo Miceli (LATS, 2023)

B-open Defect: A Novel Defect Model in FinFET Technology. - Freddy Forero; Víctor H. Champac; Michel Renovell (ACM J. Emerg. Technol. Comput. Syst., 2023)

Cost-Effective Analytical Models of Resistive Opens Defects in FinFET Technology. - Gustavo Aguirre; Freddy Forero; Víctor H. Champac; Michel Renovell; Florence Azaïs; Mariane Comte; Jean-Marc Gallière (IEEE Trans. Very Large Scale Integr. Syst., 2025)