Loop unrolling minimisation in the presence of multiple register types: A viable alternative to modulo variable expansion. - Mounira Bachir; Frederic Brault; Sid Ahmed Ali Touati; Albert Cohen 001 (HPCS, 2011)

Efficient Spilling Reduction for Software Pipelined Loops in Presence of Multiple Register Types in Embedded VLIW Processors. - Sid Ahmed Ali Touati; Frederic Brault; Karine Deschinkel; Benoît Dupont de Dinechin (ACM Trans. Embed. Comput. Syst., 2011)

Minimal Unroll Factor for Code Generation of Software Pipelining. - Mounira Bachir; Sid Ahmed Ali Touati; Frederic Brault; David Gregg; Albert Cohen 001 (Int. J. Parallel Program., 2013)

Design Driven Dummy Filling. - Frederic Brault; Philippe Morey-Chaisemartin (ISEEIE, 2021)