YAML: A Tool for Hardware Design Visualization and Capture. - Vivek Sinha; Frederic Doucet; Chuck Siska; Rajesh K. Gupta 001; Stan Y. Liao; Abhijit Ghosh (ISSS, 2000)

Interoperability as a design issue in C++ based modeling environments. - Frederic Doucet; Rajesh K. Gupta 001; Masato Otsuka; Patrick Schaumont; Sandeep K. Shukla (ISSS, 2001)

An Environment for Dynamic Component Composition for Efficient Co-Design . - Frederic Doucet; Sandeep K. Shukla; Rajesh K. Gupta 001; Masato Otsuka (DATE, 2002)

Structured Component Composition Frameworks for Embedded System Design. - Sandeep K. Shukla; Frederic Doucet; Rajesh K. Gupta 001 (HiPC, 2002)

Polychrony for Formal Refinement-Checking in a System-Level Design Methodology. - Jean-Pierre Talpin; Paul Le Guernic; Sandeep K. Shukla; Rajesh K. Gupta 001; Frederic Doucet (ACSD, 2003)

Typing abstractions and management in a component framework. - Frederic Doucet; Sandeep K. Shukla; Rajesh K. Gupta 001 (ASP-DAC, 2003)

Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated. - Frederic Doucet; Sandeep K. Shukla; Rajesh K. Gupta 001 (DATE, 2003)

Polychrony for Refinement-Based Design. - Jean-Pierre Talpin; Paul Le Guernic; Sandeep K. Shukla; Rajesh K. Gupta 001; Frederic Doucet (DATE, 2003)

BALBOA: a component-based design environment for system models. - Frederic Doucet; Sandeep K. Shukla; Masato Otsuka; Rajesh K. Gupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

Formal Refinement Checking in a System-level Design Methodology. - Jean-Pierre Talpin; Paul Le Guernic; Sandeep K. Shukla; Frederic Doucet; Rajesh K. Gupta 001 (Fundam. Informaticae, 2004)

A Verification Approach for GALS Integration of Synchronous Components. - Frederic Doucet; Massimiliano Menarini; Ingolf H. Krüger; Rajesh K. Gupta 001; Jean-Pierre Talpin (FMGALS@MEMOCODE, 2005)

Compositional interaction specifications for SystemC. - Frederic Doucet; Ingolf Krüger; Rajesh K. Gupta 001; R. K. Shyamasundar (MEMOCODE, 2006)

Reactivity in SystemC Transaction-Level Models. - Frederic Doucet; R. K. Shyamasundar; Ingolf H. Krüger; Saurabh Joshi 001; Rajesh K. Gupta 001 (Haifa Verification Conference, 2007)

Designing high-quality hardware on a development effort budget: A study of the current state of high-level synthesis. - Zelei Sun; Keith A. Campbell; Wei Zuo; Kyle Rupnow; Swathi T. Gurumani; Frederic Doucet; Deming Chen (ASP-DAC, 2016)

A methodology to take credit for high-level verification during RTL verification. - Frederic Doucet; Robert P. Kurshan (Formal Methods Syst. Des., 2017)