Pre-Layout Inductive Corners for Advanced Digital Design Interconnect: Modeling and Silicon Validation. - Laureline David; Stephane Martin; Corinne Cregut; Eric Balossier; Frederic Nyer; Fabrice Huret (ISQED, 2006)

A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization. - David Jacquet; Frederic Hasbani; Philippe Flatresse; Robin Wilson; Franck Arnaud; Giorgio Cesana; Thierry Di Gilio; Christophe Lecocq; Tanmoy Roy; Amit Chhabra; Chiranjeev Grover; Olivier Minez; et al. (IEEE J. Solid State Circuits, 2014)