A 550-ps access 900-MHz 1-Mb ECL-CMOS SRAM. - Hiroaki Nambu; Kazuo Kanetani; Kaname Yamasaki; Keiichi Higeta; Masami Usami; Masahiko Nishiyama; Kenichi Ohhata; Fumihiko Arakawa; Takeshi Kusunoki; Kunihiko Yamaguchi; Atsuo Hotta; Noriyuki Homma (IEEE J. Solid State Circuits, 2000)

Power reduction techniques for a 1-Mb ECL-CMOS SRAM with an access time of 550 ps and an operating frequency of 900 MHz. - Kenichi Ohhata; Fumihiko Arakawa; Takeshi Kusunoki; Hiroaki Nambu; Kazuo Kanetani; Kaname Yamasaki; Keiichi Higeta; Masami Usami; Masahiko Nishiyama; Kunihiko Yamaguchi; Noriyuki Homma; Atsuo Hotta (IEEE J. Solid State Circuits, 2000)