An experimental 16-Mbit CMOS DRAM chip with a 100-MHz serial read/write mode. - Shigeyoshi Watanabe; Yukihito Oowaki; Yasuo Itoh; Koji Sakui; Kenji Numata; Tsuneaki Fuse; Takayuki Kobayashi; Kenji Tsuchida; Masahiko Chiba; Takahiko Hara; Masako Ohta; Fumio Horiguchi; et al. (IEEE J. Solid State Circuits, 1989)

A 33-ns 64-Mb DRAM. - Yukihito Oowaki; Kenji Tsuchida; Yohji Watanabe; Daisaburo Takashima; Masako Ohta; Hiroaki Nakano; Shigeyoshi Watanabe; Akihiro Nitayama; Fumio Horiguchi; Kazunori Ohuchi; Fujio Masuoka (IEEE J. Solid State Circuits, 1991)

Model study of environmental concentrations of TBT in Tokyo Bay - development of a Windowsreg version prototype. - Fumio Horiguchi; Joji Yamamoto; Kisaburo Nakata (Environ. Model. Softw., 2006)

Special Section on Fundamental and Application of Advanced Semiconductor Devices. - Fumio Horiguchi (IEICE Trans. Electron., 2006)

A Precise Model for Cross-Point Memory Array. - Yoshiaki Asao; Fumio Horiguchi (IEICE Trans. Electron., 2016)

A Comprehensive Model for Write Disturbance in Resistive Memory Composed of Cross-Point Array. - Yoshiaki Asao; Fumio Horiguchi (IEICE Trans. Electron., 2017)