COOL interconnect low power interconnection technology for scalable 3D LSI design. - Marco Chacin; Hiroyuki Uchida; Michiya Hagimoto; Takashi Miyazaki; Takeshi Ohkawa; Rimon Ikeno; Yukoh Matsumoto; Fumito Imura; Motohiro Suzuki; Katsuya Kikuchi; Hiroshi Nakagawa; Masahiro Aoyagi (COOL Chips, 2011)

Cool System scalable 3-D stacked heterogeneous Multi-Core / Multi-Chip architecture for ultra low-power digital TV applications. - Yukoh Matsumoto; Tomoyuki Morimoto; Michiya Hagimoto; Hiroyuki Uchida; Nobuyuki Hikichi; Fumito Imura; Hiroshi Nakagawa; Masahiro Aoyagi (COOL Chips, 2012)

Impact of die thinning on the thermal performance of a central TSV bus in a 3D stacked circuit. - Samson Melamed; Fumito Imura; Hiroshi Nakagawa; Katsuya Kikuchi; Michiya Hagimoto; Yukoh Matsumoto; Masahiro Aoyagi (Microelectron. J., 2015)

Packaging in minimal fab: An integrated semiconductor line from wafer process to packaging process. - Michihiro Inoue; Fumito Imura; Arami Saruwatari; Shiro Hara (ICICDT, 2016)