A 28-Gb/s 4.5-pJ/bit transceiver with 1-tap decision feedback equalizer in 28-nm CMOS. - Hiroki Miyaoka; Futoshi Terasawa; Masahiro Kudo; Hideki Kano; Atsushi Matsuda; Noriaki Shirai; Shigeaki Kawai; Tomoyuki Arai; Yutaka Ide; Kazuhiro Terashima; Hirohito Higashi; Tomokazu Higuchi; et al. (A-SSCC, 2015)

3.5 A 56Gb/s NRZ-electrical 247mW/lane serial-link transceiver in 28nm CMOS. - Takayuki Shibasaki; Takumi Danjo; Yuuki Ogata; Yasufumi Sakai; Hiroki Miyaoka; Futoshi Terasawa; Masahiro Kudo; Hideki Kano; Atsushi Matsuda; Shigeaki Kawai; Tomoyuki Arai; Hirohito Higashi; et al. (ISSCC, 2016)

A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS. - Hiroki Miyaoka; Futoshi Terasawa; Masahiro Kudo; Hideki Kano; Atsushi Matsuda; Noriaki Shirai; Shigeaki Kawai; Takayuki Shibasaki; Takumi Danjo; Yuuki Ogata; Yasufumi Sakai; Hisakatsu Yamaguchi; et al. (VLSI Circuits, 2016)