LCD-reification: a formal method for developing Prolog programs. - Fuyau Lin; Frances E. Hunt (IWSSD, 1989)

Automatic formal verification of systolic array designs. - Nam Ling; Fuyau Lin; Timothy K. Shih; Ruth E. Davis (ASAP, 1991)

Verification tool for systolic array design. - Fuyau Lin; Timothy K. Shih; Nam Ling (ICTAI, 1991)

Disciplined Exceptions in Logic Programming. - Timothy K. Shih; Ruth E. Davis; Fuyau Lin (ALPUK, 1992)

Integrating CASE Tools with Knowledge-Base by Object Orientation. - Fuyau Lin; Rob Langsner (ICCI, 1992)

Verification of Systolic Architecture Designs. - Fuyau Lin; Timothy K. Shih (PARLE, 1992)

A Formalism for Specifying Communicating Processes. - Fuyau Lin (ACM Conference on Computer Science, 1993)

A parallel computation network for the maximm clique problem. - Fuyau Lin (ISCAS, 1993)

Design and Validation of a Message-Passing System. - Fuyau Lin (IWSSD, 1993)

Formal Verification of the File Transfer Protocol. - Fuyau Lin (SEKE, 1995)

Formal Verification of a Message-Passing Protocol with Model Checking. - Arthur Lin; Fuyau Lin (SEKE, 1995)

An Operational Semantics Approach to Disciplined Exceptions in Logic Programming. - Timothy K. Shih; Fuyau Lin (Comput. Artif. Intell., 1995)

On the Construction of a Prolog-Based Verifier for Systolic Array Designs. - Timothy K. Shih; Nam Ling; Ruth E. Davis; Fuyau Lin (Comput. Intell., 1995)