A 200-MHz 16-bit super high-speed signal processor (SSSP) LSI. - Masakazu Yamashina; Junichi Goto; Fuyuki Okamoto; Koichi Ando; Hachiro Yamada; Tadahiko Horiuchi; Kimiko Nakamura; Tadayoshi Enomoto (IEEE J. Solid State Circuits, 1989)

A 200-MFLOPS 100-MHz 64-b BiCMOS vector-pipelined processor (VPP) ULSI. - Fuyuki Okamoto; Yasuhiko Hagihara; Chie Ohkubo; Naoki Nishi; Hachiro Yamada; Tadayoshi Enomoto (IEEE J. Solid State Circuits, 1991)

Floating-point datapaths with online built-in self speed test. - Yasuhiko Hagihara; Shigeto Inui; Fuyuki Okamoto; Masato Nishida; Toshihiko Nakamura; Hachiro Yamada (IEEE J. Solid State Circuits, 1997)

Digital book reader based on leading text. - Mitsuru Minakuchi; Fuyuki Okamoto (Advances in Computer Entertainment, 2014)