From program to hardware: A parallel architecture compiler. - Michel Auguin; Fernand Boéri; C. Carrière; G. Menez (Microprocessing and Microprogramming, 1990)

Automatic generation of architectural models for designing dedicated VLIW signal processors. - G. Menez; Michel Auguin; Fernand Boéri; C. Carrière (ICASSP, 1992)

A partitioning algorithm for system-level synthesis. - G. Menez; Michel Auguin; Fernand Boéri; C. Carrière (ICCAD, 1992)

A comparison study of minimization methods of unit interconnection in VLIW processors. - C. Carrière; Michel Auguin; Fernand Boéri; G. Menez (Microprocess. Microprogramming, 1992)

Synthesis of dedicated SIMD processors. - Michel Auguin; Fernand Boéri; C. Carrière; G. Menez (ASAP, 1993)

Incremental synthesis of application domain specific processors. - Michel Auguin; Fernand Boéri; C. Carrière; G. Menez (ICASSP (1), 1993)

Contribution of Compilation Techniques to the Synthesis of Dedicated VLIW Architectures. - G. Menez; Michel Auguin; Fernand Boéri; C. Carrière (Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, 1993)