Analysis of Design Methodology with Logic Cell Arrays. - Rita Cucchiara; Giovanni Neri; G. Rustichelli; Tullio Salmon Cinotti (VLSI Design, 1992)

Reconfiguring the boundaries of a mesh-connected array of processors with run-time programmable logic. - Rita Cucchiara; Tullio Salmon Cinotti; Giovanni Neri; G. Rustichelli (Microprocess. Microsystems, 1993)