Loai G. Salem
Orcid: 0000-0002-5652-5098
According to our database1,
Loai G. Salem
authored at least 27 papers
between 2011 and 2023.
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Bibliography
2023
Analysis and Optimization of Switched-Capacitor Piezoelectric Energy Harvesting Interface Circuits.
IEEE Trans. Very Large Scale Integr. Syst., September, 2023
IEEE J. Solid State Circuits, March, 2023
A 96.6%-Efficiency Inductively Assisted Switched- Capacitor DC-DC Converter with 0.5-to-1.5V Output Voltage Range.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2022
A Multilevel N-Path Filter Topology for Low-Power Sinusoidal Clocking with Non-Overlapping Phases.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
Frequency-Selective Limiting Using Automatic Gain Control of Stagger-Tuned N-Path Filters.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
Proceedings of the 47th ESSCIRC 2021, 2021
2020
An N-Path Switched-Capacitor Rectifier for Piezoelectric Energy Harvesting Achieving 13.9× Power Extraction Improvement.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2018
A Successive Approximation Recursive Digital Low-Dropout Voltage Regulator With PD Compensation and Sub-LSB Duty Control.
IEEE J. Solid State Circuits, 2018
A sub-1.55mV-accuracy 36.9ps-FOM digital-low-dropout regulator employing switched-capacitor resistance.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
IEEE J. Solid State Circuits, 2017
20.3 A 100nA-to-2mA successive-approximation digital LDO with PD compensation and sub-LSB duty control achieving a 15.1ns response time at 0.5V.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
26.4 A 0.4-to-1V 1MHz-to-2GHz switched-capacitor adiabatic clock driver achieving 55.6% clock power reduction.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
12.9 A flying-domain DC-DC converter powering a Cortex-M0 processor with 90.8% efficiency.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
A recursive house-of-cards digital power amplifier employing a λ/4-less Doherty power combiner in 65nm CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
Proceedings of the Symposium on VLSI Circuits, 2015
A footprint-constrained efficiency roadmap for on-chip switched-capacitor DC-DC converters.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A single-inductor 7+7 ratio reconfigurable resonant switched-capacitor DC-DC converter with 0.1-to-1.5V output voltage range.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
A Recursive Switched-Capacitor DC-DC Converter Achieving 2<sup>N</sup>-1 Ratios With High Efficiency Over a Wide Output Voltage Range.
IEEE J. Solid State Circuits, 2014
4.6 An 85%-efficiency fully integrated 15-ratio recursive switched-capacitor DC-DC converter with 0.1-to-2.2V output voltage range.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
A 45-ratio recursively sliced series-parallel switched-capacitor DC-DC converter achieving 86% efficiency.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
A novel control technique to eliminate output-voltage-ripple in switched-capacitor DC-DC converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Conference on Energy Aware Computing, 2011
Proceedings of the International Conference on Energy Aware Computing, 2011