Scalable Construction of Formal Error Guaranteed LUT-Based Approximate Multipliers with Analytical Worst-Case Error Bound. - Anishetti Venkatesh; Chandan Kumar Jha 001; G. U. Vinod; Masahiro Fujita; Virendra Singh (VDAT, 2022)

Optimization of Imprecise Multiplier Circuits by using Binary Decision Diagram. - Pooja Choudhary; Lava Bhargava; G. U. Vinod; Ashok Kumar Suhag; Masahiro Fujita; Virendra Singh (iSES, 2023)