Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art. - Gabriel Fernandez 002; Jaume Abella 001; Eduardo Quiñones; Christine Rochange; Tullio Vardanega; Francisco J. Cazorla (WCET, 2014)

Increasing confidence on measurement-based contention bounds for real-time round-robin buses. - Gabriel Fernandez 002; Javier Jalle; Jaume Abella 001; Eduardo Quiñones; Tullio Vardanega; Francisco J. Cazorla (DAC, 2015)

Resource usage templates and signatures for COTS multicore processors. - Gabriel Fernandez 002; Javier Jalle; Jaume Abella 001; Eduardo Quiñones; Tullio Vardanega; Francisco J. Cazorla (DAC, 2015)

Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors. - Gabriel Fernandez 002; Jaume Abella 001; Eduardo Quiñones; Luca Fossati; Marco Zulianello; Tullio Vardanega; Francisco J. Cazorla (ISORC, 2015)

Introduction to partial time composability for COTS multicores. - Gabriel Fernandez 002; Jaume Abella 001; Eduardo Quiñones; Tullio Vardanega; Luca Fossati; Marco Zulianello; Francisco J. Cazorla (SAC, 2015)

Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration. - Gabriel Fernandez 002; Javier Jalle; Jaume Abella 001; Eduardo Quiñones; Tullio Vardanega; Francisco J. Cazorla (IEEE Trans. Computers, 2017)

Assessing Time Predictability Features of ARM Big. LITTLE Multicores. - Gabriel Fernandez 002; Francisco J. Cazorla; Jaume Abella 001; Sylvain Girbal (SBAC-PAD, 2018)

Enhancing timing analysis for COTS multicores for safety-related industry : a software approach. - Gabriel Alejandro Fernandez Diaz (2018)

Multicore Early Design Stage Guaranteed Performance Estimates for the Space Domain. - Mikel Fernández; Gabriel Fernandez 002; Jaume Abella 001; Francisco J. Cazorla (DATE, 2019)

Surrogate Applications for Early Design Stage Multicore Contention Modeling. - Gabriel Fernandez 002; Jaume Abella 001; Guillem Bernat; Francisco J. Cazorla (IEEE Trans. Emerg. Top. Comput., 2021)