Determining Fault Ratios in Multilevel Delayed-Staging Storage Hierarchies. - Gabriel M. Silberman (IEEE Trans. Computers, 1982)

Simulating pass transistor circuits using logic simulation machines. - Zeev Barzilai; Leendert M. Huisman; Gabriel M. Silberman; Donald T. Tang; Lin S. Woo (DAC, 1983)

A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach. - Israel Koren; Gabriel M. Silberman (ICPP, 1983)

Stack Processing Techniques in Delayed-Staging Storage Hierarchies. - Gabriel M. Silberman (Commun. ACM, 1983)

Delayed-Staging Hierarchy Optimization. - Gabriel M. Silberman (IEEE Trans. Computers, 1983)

Fast Pass-Transistor Simulation for Custom MOS Circuits. - Zeev Barzilai; Leendert M. Huisman; Gabriel M. Silberman; Donald T. Tang; Lin S. Woo (IEEE Des. Test, 1984)

Using a Hardware Simulation Engine for Custom MOS Structured Designs. - Zeev Barzilai; Daniel K. Beece; Leendert M. Huisman; Gabriel M. Silberman (IBM J. Res. Dev., 1984)

Embedding Tree Stuctures in VLlSI Hexagonal Arrays. - Dan Gordon 001; Israel Koren; Gabriel M. Silberman (IEEE Trans. Computers, 1984)

Accurate Fault Modeling and Efficient Simulation of Differential CVS Circuits. - Zeev Barzilai; Vijay S. Iyengar; Barry K. Rosen; Gabriel M. Silberman (ITC, 1985)

SLS - a fast switch level simulator for verification and fault coverage analysis. - Zeev Barzilai; Daniel K. Beece; Leendert M. Huisman; Vijay S. Iyengar; Gabriel M. Silberman (DAC, 1986)

Efficient Fault Simulation of CMOS Circuits with Accurate Models. - Zeev Barzilai; J. Lawrence Carter; Vijay S. Iyengar; Indira Nair; Barry K. Rosen; Joe D. Rutledge; Gabriel M. Silberman (ITC, 1986)

The Difference Fault Model : Using Functional Fault Simulation to Obtain Implementation Fault Coverage. - Gabriel M. Silberman; Ilan Y. Spillinger (ITC, 1986)

Improving the Performance of a Switch-Level Simulator Targeted for a Logic Simulation Machine. - Ilan Y. Spillinger; Gabriel M. Silberman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

An Improved Mapping of Data Flow Programs on a VLSI Array of Processors. - Bilha Mendelson; Gabriel M. Silberman (ICPP, 1987)

Mapping Data Flow Programs on a VLSI Array of Processors. - Bilha Mendelson; Gabriel M. Silberman (ISCA, 1987)

The Effect of Operation Scheduling on the Performance of a Data Flow Computer. - Michael Granski; Israel Koren; Gabriel M. Silberman (IEEE Trans. Computers, 1987)

G-RIDDLE : A Formal Analysis of Logic Designs Condiucive to the Acceleration of Backtracing. - Gabriel M. Silberman; Ilan Y. Spillinger (ITC, 1988)

A Data-Driven VLSI Array for Arbitrary Algorithms. - Israel Koren; Bilha Mendelson; Irit Peled; Gabriel M. Silberman (Computer, 1988)

Minimum-Diameter Cyclic Arrangements in Mapping Data-Flow Graphs onto VLSI Arrays. - Paul Erdös; Israel Koren; Shlomo Moran; Gabriel M. Silberman; Shmuel Zaks (Math. Syst. Theory, 1988)

SLS-a fast switch-level simulator [for MOS]. - Zeev Barzilai; Daniel K. Beece; Leendert M. Huisman; Vijay S. Iyengar; Gabriel M. Silberman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Architectural Improvements for Data-Driven VLSI Processing Arrays. - Shlomit Weiss; Ilan Y. Spillinger; Gabriel M. Silberman (FPCA, 1989)

Whistle: A Workbench for Test Development of Library-Based Designs. - Raphael Renous; Gabriel M. Silberman; Ilan Y. Spillinger (Computer, 1989)

Using functional fault simulation and the difference fault model to estimate implementation fault coverage. - Gabriel M. Silberman; Ilan Y. Spillinger (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Functional Fault Simulation as a Guide for Biased-Random Test Pattern Generation. - Gabriel M. Silberman; Ilan Y. Spillinger (IEEE Trans. Computers, 1991)

RIDDLE: A Foundation for Test Generation on a High-Level Design Description. - Gabriel M. Silberman; Ilan Y. Spillinger (IEEE Trans. Computers, 1991)

An architectural framework for migration from CISC to higher performance platforms. - Gabriel M. Silberman; Kemal Ebcioglu (ICS, 1992)

An Architectural Framework for Supporting Heterogeneous Instruction-Set Architectures. - Gabriel M. Silberman; Kemal Ebcioglu (Computer, 1993)

Architectural Improvement for a Data-Driven VLSI Processing Array. - Shlomit Weiss; Ilan Y. Spillinger; Gabriel M. Silberman (J. Parallel Distributed Comput., 1993)

VLIW Compilation Techniques in a Superscalar Environment. - Kemal Ebcioglu; Randy D. Groves; Ki-Chang Kim; Gabriel M. Silberman; Isaac Ziv (PLDI, 1994)

A backtracing-oriented procedure for the analysis of combinational gate-level designs. - Gabriel M. Silberman; Ilan Y. Spillinger (Integr., 1994)

The Third International Conference on Parallel Computing Technologies (PaCT-95), Saint Petersburg, Russia. - Gabriel M. Silberman (ACM SIGPLAN Notices, 1996)

Overview: The Centre for Advanced Studies. - Stephen G. Perelgut; Gabriel M. Silberman; Kelly A. Lyons; Karen Bennet (IBM Syst. J., 1997)

Foreword to the special issues. - Walid A. Najjar; Gabriel M. Silberman (Int. J. Parallel Program., 1997)

New Software Engineering Faculty Symposium. - Leon J. Osterweil; Gabriel M. Silberman; Kenny Wong (ICSE, 2001)

Introduction. - Michael A. Bauer 001; Gene F. Hoffnagle; J. Howard Johnson; Gabriel M. Silberman (Inf. Syst. Frontiers, 2002)

Agile architecture methodology: long term strategy interleaved with short term tactics. - Ethan Hadar; Gabriel M. Silberman (OOPSLA Companion, 2008)

The 4x6 Tiered Architecture Method: An Approach to the Design of Enterprise Solutions. - Ethan Hadar; Irit Hadar; Gabriel M. Silberman; John J. Harrison Jr. (CAiSE Workshops, 2012)