Critical charge characterization in 6-T SRAMs during read mode. - Sebastià A. Bota; Gabriel Torrens; Bartomeu Alorda (IOLTS, 2009)

Static and dynamic stability improvement strategies for 6T CMOS low-power SRAMs. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (DATE, 2010)

Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories. - Sebastià A. Bota; Gabriel Torrens; Bartomeu Alorda; Jaume Verd; Jaume Segura 001 (IOLTS, 2010)

Design Hardening of Nanometer SRAMs Through Transistor Width Modulation and Multi-Vt Combination. - Gabriel Torrens; Bartomeu Alorda; Salvador Barceló; José Luis Rosselló; Sebastià A. Bota; Jaume Segura 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Stability optimization of embedded 8T SRAMs using Word-Line Voltage modulation. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (DATE, 2011)

8T vs. 6T SRAM cell radiation robustness: A comparative analysis. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2011)

Accurate alpha soft error rate evaluation in SRAM memories. - Sebastià A. Bota; Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; L. A. Segura (IOLTS, 2013)

Adaptive static and dynamic noise margin improvement in minimum-sized 6T-SRAM cells. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2014)

On-line write margin estimator to monitor performance degradation in SRAM cores. - Bartomeu Alorda; Cristian Carmona; Gabriel Torrens; Sebastià A. Bota (IOLTS, 2016)

An affordable experimental technique for SRAM write margin characterization for nanometer CMOS technologies. - Bartomeu Alorda; Cristian Carmona; Gabriel Torrens; Sebastià A. Bota (Microelectron. Reliab., 2016)

Evaluation of SRAM cell write margin metrics for lifetime monitoring of BTI-induced Vth drift. - Bartomeu Alorda; Gabriel Torrens (DTIS, 2017)

Cantilever NEMS relay-based SRAM devices for enhanced reliability. - Sebastià A. Bota; Jaume Verd; Joan Barceló; Xavier Gili; Bartomeu Alorda; Gabriel Torrens; Carol de Benito; Jaume Segura 001 (DTIS, 2017)

6T CMOS SRAMs reliability monitoring through stability measurements. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota (IOLTS, 2017)

Statistical characterization and modeling of random telegraph noise effects in 65nm SRAMs cells. - Javier Martín-Martínez; Rosana Rodríguez; Montserrat Nafría; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001; Francesc Moll; Antonio Rubio 001 (SMACD, 2017)

Soft error rate comparison of 6T and 8T SRAM ICs using mono-energetic proton and neutron irradiation sources. - Daniel Malagón; Sebastià A. Bota; Gabriel Torrens; Xavier Gili; Javier Praena; B. Fernández; Miguel Macías; José Manuel Quesada 001; Carlos Guerrero Sanchez; María del Carmen Jiménez-Ramos; Javier García López; José Luis Merino; et al. (Microelectron. Reliab., 2017)

Weak and Strong SRAM cells analysis in embedded memories for PUF applications. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2019)

A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors. - Gabriel Torrens; Bartomeu Alorda; Cristian Carmona; Daniel Malagón-Periánez; Jaume Segura 001; Sebastià A. Bota (IEEE Trans. Emerg. Top. Comput., 2019)

Selection of SRAM Cells to improve Reliable PUF implementation using Cell Mismatch Metric. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2020)

Bit-Cell Selection Analysis for Embedded SRAM-Based PUF. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (ISCAS, 2020)

SRAM-cells Reproducibility Metrics for Physical Unclonable Function Applications. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2022)

A Compact Double-Exponential Circuit for Single Event Transient Emulation. - Sebastià A. Bota; Salvador Barceló; Gabriel Torrens; Rafel Perelló; Jaume Verd; Ivan de Paúl; Jaume Segura 001 (DCIS, 2023)

SRAM Alpha-SER Estimation From Word-Line Voltage Margin Measurements: Design Architecture and Experimental Results. - Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; Sebastià A. Bota; Jaume Segura 001 (CoRR, 2024)

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment. - Daniel Malagón; Gabriel Torrens; Jaume Segura 001; Sebastià A. Bota (CoRR, 2024)

Estimation during Design Phases of Suitable SRAM Cells for PUF Applications Using Separatrix and Mismatch Metrics. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (CoRR, 2024)

SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram. - Gabriel Torrens; Abdel Alheyasat; Bartomeu Alorda; Sebastià A. Bota (CoRR, 2024)