An Efficient Hardware Implementation of DVFS in Multi-core System with Wireless Network-on-Chip. - Hemanta Kumar Mondal; Gade Narayana Sri Harsha; Sujay Deb (ISVLSI, 2014)

Power- and performance-aware fine-grained reconfigurable router architecture for NoC. - Hemanta Kumar Mondal; Sri Harsha Gade; Raghav Kishore; Sujay Deb (IGSC, 2015)

Design of signal-matched critically sampled FIR rational filterbank. - Anupriya Gogna; Sri Harsha Gade; Anubha Gupta (ICASSP, 2015)

Achievable Performance Enhancements with mm-Wave Wireless Interconnects in NoC. - Sri Harsha Gade; Sujay Deb (NOCS, 2015)

A Hardware and Thermal Analysis of DVFS in a Multi-core System with Hybrid WNoC Architecture. - Gade Narayana Sri Harsha; Hemanta Kumar Mondal; Sujay Deb (VLSID, 2015)

Adaptive multi-voltage scaling in wireless NoC for high performance low power applications. - Hemanta Kumar Mondal; Sri Harsha Gade; Raghav Kishore; Sujay Deb (DATE, 2016)

Power efficient router architecture for wireless Network-on-Chip. - Hemanta Kumar Mondal; Sri Harsha Gade; Raghav Kishore; Shashwat Kaushik; Sujay Deb (ISQED, 2016)

A Pre-RTL floorplanner tool for automated CMP design space exploration with thermal awareness. - Sri Harsha Gade; Praveen Kumar; Sujay Deb (VDAT, 2016)

Energy Efficient NoC Router for High Throughput Applications in Many-Core GPUs. - Shrestha Bansal; Hemanta Kumar Mondal; Sri Harsha Gade; Sujay Deb (iNIS, 2017)

OFDM Based High Data Rate, Fading Resilient Transceiver for Wireless Networks-on-Chip. - Sri Harsha Gade; Sakshi Garg 002; Sujay Deb (ISVLSI, 2017)

Path loss-aware adaptive transmission power control scheme for energy-efficient wireless NoC. - Shashwat Kaushik; Muni Agrawal; Hemanta Kumar Mondal; Sri Harsha Gade; Sujay Deb (MWSCAS, 2017)

Energy-Efficient Transceiver for Wireless NoC. - Hemanta Kumar Mondal; Shashwat Kaushik; Sri Harsha Gade; Sujay Deb (VLSID, 2017)

P2NoC: Power- and Performance-aware NoC Architectures for Sustainable Computing. - Hemanta Kumar Mondal; Sri Harsha Gade; Raghav Kishore; Sujay Deb (Sustain. Comput. Informatics Syst., 2017)

HyWin: Hybrid Wireless NoC with Sandboxed Sub-Networks for CPU/GPU Architectures. - Sri Harsha Gade; Sujay Deb (IEEE Trans. Computers, 2017)

Interference-Aware Wireless Network-on-Chip Architecture Using Directional Antennas. - Hemanta Kumar Mondal; Sri Harsha Gade; Md Shahriar Shamim; Sujay Deb; Amlan Ganguly (IEEE Trans. Multi Scale Comput. Syst., 2017)

Adaptive Multi-Voltage Scaling with Utilization Prediction for Energy-Efficient Wireless NoC. - Hemanta Kumar Mondal; Sri Harsha Gade; Shashwat Kaushik; Sujay Deb (IEEE Trans. Sustain. Comput., 2017)

Data-flow Aware CNN Accelerator with Hybrid Wireless Interconnection. - Mitali Sinha; Sri Harsha Gade; Wazir Singh; Sujay Deb (ASAP, 2018)

Reliability Analysis of On-Chip Wireless Links for Many Core WNoCs. - Sri Harsha Gade; Sidhartha Sankar Rout; Ravi Kashyap; Sujay Deb (DCIS, 2018)

Near Threshold Last Level Cache for Energy Efficient Embedded Applications. - Mitali Sinha; Sidhartha Sankar Rout; Sri Harsha Gade; Sujay Deb (IGSC, 2018)

A Utilization Aware Robust Channel Access Mechanism for Wireless NoCs. - Sri Harsha Gade; Sidhartha Sankar Rout; Mitali Sinha; Hemanta Kumar Mondal; Wazir Singh; Sujay Deb (ISCAS, 2018)

Dynamic NoC platform for varied application needs. - Sidhartha Sankar Rout; Hemanta Kumar Mondal; Rohan Juneja; Sri Harsha Gade; Sujay Deb (ISQED, 2018)

High Bandwidth Off-Chip Memory Access Through Hybrid Switching and Inter-Chip Wireless Links. - Sri Harsha Gade; Hemanta Kumar Mondal; Sujay Deb (ISVLSI, 2018)

Enabling Reliable High Throughput On-chip Wireless Communication for Many Core Architectures. - Sri Harsha Gade; Mitali Sinha; Sidhartha Sankar Rout; Sujay Deb (ISVLSI, 2018)

On-Chip Wireless Channel Propagation: Impact of Antenna Directionality and Placement on Channel Performance. - Sri Harsha Gade; Sidhartha Sankar Rout; Sujay Deb (NOCS, 2018)

Millimeter wave wireless interconnects in deep submicron chips: Challenges and opportunities. - Sri Harsha Gade; Shobha Sundar Ram; Sujay Deb (Integr., 2019)

Energy Efficient Chip-to-Chip Wireless Interconnection for Heterogeneous Architectures. - Sri Harsha Gade; M. Meraj Ahmed; Sujay Deb; Amlan Ganguly (ACM Trans. Design Autom. Electr. Syst., 2019)

Automated Synthesis of Custom Networks-on-Chip for Real World Applications. - Anup Gangwar; Nitin Kumar Agarwal 001; Ravishankar Sreedharan; Ambica Prasad; Sri Harsha Gade; Zheng Xu (ICCAD, 2020)

Topology Agnostic Virtual Channel Assignment and Protocol Level Deadlock Avoidance in a Network-on-Chip. - Anup Gangwar; Ravishankar Sreedharan; Ambica Prasad; Nitin Kumar Agarwal 001; Sri Harsha Gade (DAC, 2021)

An Automated Traffic Generation Framework for Performance Evaluation of Networks-on-Chip for Real World Use Cases. - Sri Harsha Gade; Anup Gangwar; Ambica Prasad; Nitin Kumar Agarwal 001; Ravishankar Sreedharan (ISPASS, 2021)

Design Space Optimization of Shared Memory Architecture in Accelerator-rich Systems. - Mitali Sinha; Sri Harsha Gade; Pramit Bhattacharyya; Sujay Deb (ACM Trans. Design Autom. Electr. Syst., 2021)

Scalable Hybrid Cache Coherence Using Emerging Links for Chiplet Architectures. - Sri Harsha Gade; Mitali Sinha; Madhur Kumar; Sujay Deb (VLSID, 2022)

A Novel Hybrid Cache Coherence with Global Snooping for Many-core Architectures. - Sri Harsha Gade; Sujay Deb (ACM Trans. Design Autom. Electr. Syst., 2022)